Call external functions when inline-asm is not set
This commit is contained in:
parent
41378757c0
commit
061579f97e
24
src/asm.rs
24
src/asm.rs
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@ -1,7 +1,7 @@
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//! Assembly instructions
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macro_rules! instruction {
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($fnname:ident, $asm:expr) => (
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($fnname:ident, $asm:expr, $asm_fn:ident) => (
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#[inline]
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pub unsafe fn $fnname() {
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match () {
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@ -9,7 +9,13 @@ macro_rules! instruction {
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() => asm!($asm :::: "volatile"),
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#[cfg(all(riscv, not(feature = "inline-asm")))]
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() => unimplemented!(),
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() => {
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extern "C" {
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fn $asm_fn();
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}
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$asm_fn();
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}
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#[cfg(not(riscv))]
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() => unimplemented!(),
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@ -20,9 +26,9 @@ macro_rules! instruction {
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/// Priviledged ISA Instructions
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instruction!(ebreak, "ebreak");
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instruction!(wfi, "wfi");
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instruction!(sfence_vma_all, "sfence.vma");
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instruction!(ebreak, "ebreak", __ebreak);
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instruction!(wfi, "wfi", __wfi);
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instruction!(sfence_vma_all, "sfence.vma", __sfence_vma_all);
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#[inline]
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@ -33,7 +39,13 @@ pub unsafe fn sfence_vma(asid: usize, addr: usize) {
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() => asm!("sfence.vma $0, $1" :: "r"(asid), "r"(addr) :: "volatile"),
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#[cfg(all(riscv, not(feature = "inline-asm")))]
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() => unimplemented!(),
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() => {
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extern "C" {
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fn __sfence_vma(asid: usize, addr: usize);
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}
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__sfence_vma(asid, addr);
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}
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#[cfg(not(riscv))]
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() => unimplemented!(),
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@ -1,5 +1,5 @@
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macro_rules! read_csr {
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($csr_number:expr) => {
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($csr_number:expr, $asm_fn: ident) => {
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/// Reads the CSR
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#[inline]
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unsafe fn _read() -> usize {
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@ -12,7 +12,13 @@ macro_rules! read_csr {
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}
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#[cfg(all(riscv, not(feature = "inline-asm")))]
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() => unimplemented!(),
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() => {
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extern "C" {
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fn $asm_fn() -> usize;
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}
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$asm_fn()
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}
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#[cfg(not(riscv))]
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() => unimplemented!(),
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@ -22,7 +28,7 @@ macro_rules! read_csr {
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}
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macro_rules! read_csr_rv32 {
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($csr_number:expr) => {
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($csr_number:expr, $asm_fn: ident) => {
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/// Reads the CSR
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#[inline]
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unsafe fn _read() -> usize {
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@ -35,7 +41,13 @@ macro_rules! read_csr_rv32 {
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}
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#[cfg(all(riscv32, not(feature = "inline-asm")))]
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() => unimplemented!(),
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() => {
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extern "C" {
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fn $asm_fn() -> usize;
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}
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$asm_fn()
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}
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#[cfg(not(riscv32))]
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() => unimplemented!(),
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@ -45,8 +57,8 @@ macro_rules! read_csr_rv32 {
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}
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macro_rules! read_csr_as {
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($register:ident, $csr_number:expr) => {
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read_csr!($csr_number);
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($register:ident, $csr_number:expr, $asm_fn: ident) => {
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read_csr!($csr_number, $asm_fn);
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/// Reads the CSR
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#[inline]
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@ -57,8 +69,8 @@ macro_rules! read_csr_as {
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}
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macro_rules! read_csr_as_usize {
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($csr_number:expr) => {
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read_csr!($csr_number);
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($csr_number:expr, $asm_fn: ident) => {
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read_csr!($csr_number, $asm_fn);
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/// Reads the CSR
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#[inline]
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@ -69,8 +81,8 @@ macro_rules! read_csr_as_usize {
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}
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macro_rules! read_csr_as_usize_rv32 {
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($csr_number:expr) => {
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read_csr_rv32!($csr_number);
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($csr_number:expr, $asm_fn: ident) => {
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read_csr_rv32!($csr_number, $asm_fn);
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/// Reads the CSR
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#[inline]
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@ -81,7 +93,7 @@ macro_rules! read_csr_as_usize_rv32 {
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}
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macro_rules! write_csr {
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($csr_number:expr) => {
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($csr_number:expr, $asm_fn: ident) => {
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/// Writes the CSR
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#[inline]
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#[allow(unused_variables)]
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@ -91,7 +103,13 @@ macro_rules! write_csr {
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() => asm!("csrrw x0, $1, $0" :: "r"(bits), "i"($csr_number) :: "volatile"),
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#[cfg(all(riscv, not(feature = "inline-asm")))]
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() => unimplemented!(),
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() => {
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extern "C" {
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fn $asm_fn(bits: usize);
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}
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$asm_fn(bits);
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}
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#[cfg(not(riscv))]
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() => unimplemented!(),
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@ -101,8 +119,8 @@ macro_rules! write_csr {
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}
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macro_rules! write_csr_as_usize {
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($csr_number:expr) => {
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write_csr!($csr_number);
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($csr_number:expr, $asm_fn: ident) => {
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write_csr!($csr_number, $asm_fn);
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/// Writes the CSR
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#[inline]
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@ -113,7 +131,7 @@ macro_rules! write_csr_as_usize {
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}
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macro_rules! set {
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($csr_number:expr) => {
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($csr_number:expr, $asm_fn: ident) => {
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/// Set the CSR
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#[inline]
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#[allow(unused_variables)]
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@ -123,7 +141,13 @@ macro_rules! set {
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() => asm!("csrrs x0, $1, $0" :: "r"(bits), "i"($csr_number) :: "volatile"),
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#[cfg(all(riscv, not(feature = "inline-asm")))]
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() => unimplemented!(),
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() => {
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extern "C" {
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fn $asm_fn(bits: usize);
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}
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$asm_fn(bits);
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}
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#[cfg(not(riscv))]
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() => unimplemented!(),
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@ -133,7 +157,7 @@ macro_rules! set {
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}
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macro_rules! clear {
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($csr_number:expr) => {
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($csr_number:expr, $asm_fn: ident) => {
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/// Clear the CSR
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#[inline]
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#[allow(unused_variables)]
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@ -143,7 +167,13 @@ macro_rules! clear {
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() => asm!("csrrc x0, $1, $0" :: "r"(bits), "i"($csr_number) :: "volatile"),
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#[cfg(all(riscv, not(feature = "inline-asm")))]
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() => unimplemented!(),
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() => {
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extern "C" {
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fn $asm_fn(bits: usize);
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}
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$asm_fn(bits);
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}
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#[cfg(not(riscv))]
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() => unimplemented!(),
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@ -136,4 +136,4 @@ impl Mcause {
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}
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}
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read_csr_as!(Mcause, 0x342);
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read_csr_as!(Mcause, 0x342, __read_mcause);
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@ -1,3 +1,3 @@
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//! mcycle register
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read_csr_as_usize!(0xB00);
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read_csr_as_usize!(0xB00, __read_mcycle);
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@ -1,3 +1,3 @@
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//! mcycleh register
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read_csr_as_usize_rv32!(0xB80);
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read_csr_as_usize_rv32!(0xB80, __read_mcycleh);
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@ -1,3 +1,3 @@
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//! mepc register
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read_csr_as_usize!(0x341);
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read_csr_as_usize!(0x341, __read_mepc);
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@ -68,9 +68,9 @@ impl Mie {
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}
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}
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read_csr_as!(Mie, 0x304);
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set!(0x304);
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clear!(0x304);
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read_csr_as!(Mie, 0x304, __read_mie);
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set!(0x304, __set_mie);
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clear!(0x304, __clear_mie);
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/// User Software Interrupt Enable
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set_clear_csr!(set_usoft, clear_usoft, 1 << 0);
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@ -1,3 +1,3 @@
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//! minstret register
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read_csr_as_usize!(0xB02);
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read_csr_as_usize!(0xB02, __read_minstret);
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@ -1,3 +1,3 @@
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//! minstreth register
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read_csr_as_usize_rv32!(0xB82);
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read_csr_as_usize_rv32!(0xB82, __read_minstreth);
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@ -68,4 +68,4 @@ impl Mip {
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}
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}
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read_csr_as!(Mip, 0x344);
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read_csr_as!(Mip, 0x344, __read_mip);
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@ -47,7 +47,7 @@ impl Misa {
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}
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}
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read_csr!(0x301);
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read_csr!(0x301, __read_misa);
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/// Reads the CSR
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#[inline]
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@ -79,9 +79,9 @@ impl Mstatus {
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}
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read_csr_as!(Mstatus, 0x300);
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set!(0x300);
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clear!(0x300);
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read_csr_as!(Mstatus, 0x300, __read_mstatus);
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set!(0x300, __set_mstatus);
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clear!(0x300, __clear_mstatus);
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/// User Interrupt Enable
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set_clear_csr!(set_uie, clear_uie, 1 << 0);
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@ -34,9 +34,9 @@ impl Mtvec {
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}
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}
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read_csr_as!(Mtvec, 0x305);
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read_csr_as!(Mtvec, 0x305, __read_mtvec);
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write_csr!(0x305);
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write_csr!(0x305, __write_mtvec);
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/// Writes the CSR
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#[inline]
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@ -20,7 +20,7 @@ impl Mvendorid {
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}
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}
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read_csr!(0xF11);
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read_csr!(0xF11, __read_mvendorid);
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/// Reads the CSR
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#[inline]
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@ -84,8 +84,8 @@ pub enum Mode {
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Sv64 = 11,
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}
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read_csr_as!(Satp, 0x180);
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write_csr!(0x180);
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read_csr_as!(Satp, 0x180, __read_satp);
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write_csr!(0x180, __write_satp);
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#[inline]
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#[cfg(riscv32)]
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@ -115,4 +115,4 @@ impl Scause {
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}
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}
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read_csr_as!(Scause, 0x142);
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read_csr_as!(Scause, 0x142, __read_scause);
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@ -1,4 +1,4 @@
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//! sepc register
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read_csr_as_usize!(0x141);
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write_csr_as_usize!(0x141);
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read_csr_as_usize!(0x141, __read_sepc);
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write_csr_as_usize!(0x141, __write_sepc);
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@ -52,9 +52,9 @@ impl Sie {
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}
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}
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read_csr_as!(Sie, 0x104);
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set!(0x104);
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clear!(0x104);
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read_csr_as!(Sie, 0x104, __read_sie);
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set!(0x104, __set_sie);
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clear!(0x104, __clear_sie);
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/// User Software Interrupt Enable
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set_clear_csr!(set_usoft, clear_usoft, 1 << 0);
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@ -52,4 +52,4 @@ impl Sip {
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}
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}
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read_csr_as!(Sip, 0x144);
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read_csr_as!(Sip, 0x144, __read_sip);
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@ -1,4 +1,4 @@
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//! sscratch register
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read_csr_as_usize!(0x140);
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write_csr_as_usize!(0x140);
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read_csr_as_usize!(0x140, __read_sscratch);
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write_csr_as_usize!(0x140, __write_sscratch);
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@ -104,9 +104,9 @@ impl Sstatus {
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}
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}
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read_csr_as!(Sstatus, 0x100);
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set!(0x100);
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clear!(0x100);
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read_csr_as!(Sstatus, 0x100, __read_sstatus);
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set!(0x100, __set_sstatus);
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clear!(0x100, __clear_sstatus);
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/// User Interrupt Enable
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set_clear_csr!(set_uie, clear_uie, 1 << 0);
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@ -1,3 +1,3 @@
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//! stval register
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read_csr_as_usize!(0x143);
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read_csr_as_usize!(0x143, __read_stval);
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}
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}
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read_csr_as!(Stvec, 0x105);
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write_csr!(0x105);
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read_csr_as!(Stvec, 0x105, __read_stvec);
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write_csr!(0x105, __write_stvec);
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/// Writes the CSR
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#[inline]
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@ -1,3 +1,3 @@
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//! time register
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read_csr_as_usize!(0xC01);
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read_csr_as_usize!(0xC01, __read_time);
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@ -1,3 +1,3 @@
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//! timeh register
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read_csr_as_usize_rv32!(0xC81);
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read_csr_as_usize_rv32!(0xC81, __read_timeh);
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