forked from M-Labs/artiq-zynq
66 lines
1.7 KiB
Markdown
66 lines
1.7 KiB
Markdown
# CXP
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## Finished
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- Upconn - Low speed serial
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[x] Low speed serial PHY
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[x] 20.833Mbps & 41.666Mbps change
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[x] 8b10b encoder
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[x] TX Pipeline with priority transmission
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[x] Trigger
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[x] Trigger ack
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[x] Test & Ctrl packet with DMA
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[x] CTRL Packet serialize firmware
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[x] follow DRTIO DMA
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[x] check crc
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- Downconn - GTX
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[x] GTX serial PHY
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[x] QPLL & GTX DRP to config linerate
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[x] Comma checker & restart rx
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[x] RX Pipeline with priority decoder
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[x] Trigger ack
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[x] CTRL packet DMA with extra buffer
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[x] Connection test sequence checker
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[x] CTRL Packet deserialize firmware
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[x] follow DRTIO DMA
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[x] check crc
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[x] GTX Multilane setup
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- Camera boostrap
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[x] get the CXP version
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[x] test connection
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[x] discovery other extension (links)
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[x] set bitrate
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- Camera frame pipeline
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[x] CXP frame packet routing (maybe no need to routing non zero streaming id (we have ROI buildin anyways)?)
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[x] CXP CRC32 detection
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## TODO
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[] remove ALL debug tools
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[] flake.nix mod
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[] local_run.sh mod
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### Gateware
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[] add __init__ for cxp??
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[] Try to fix tight s/h time pins
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[] Heartbeat (is it useful?? lol)
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[] rename circular buffer to slots
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[] add enum for gtx mode (e.g. tx only, rx only, both)
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[] Test out CXP trigger
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[] Region of interest engine
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[] rtio to getting the frame
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- O: trigger
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- I: frame
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### Firmware (design with driver)
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[] Camera linkdown detection
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[] Camera auto linkup/linkdown using threads
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[] API programming
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[] add tag handling for api calls
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- support line reset in kernel using syscall
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[] add heartbeat checking
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### Coredevice Driver
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[] support simple camera programming interface (Not real time)
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- basic i2c-like interface with read/write u32
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