forked from M-Labs/artiq-zynq
phys FW: rename vars & fix compilation error
phys FW: rename
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52bea11e25
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@ -19,23 +19,23 @@ pub enum CXP_SPEED {
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}
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}
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pub fn setup(timer: &mut GlobalTimer) {
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pub fn setup(timer: &mut GlobalTimer) {
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down_conn::setup(timer);
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rx::setup(timer);
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up_conn::setup();
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tx::setup();
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change_linerate(CXP_SPEED::CXP_1);
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change_linerate(CXP_SPEED::CXP_1);
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}
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}
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pub fn change_linerate(speed: CXP_SPEED) {
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pub fn change_linerate(speed: CXP_SPEED) {
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info!("Changing all channels datarate to {:?}", speed);
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info!("Changing all channels datarate to {:?}", speed);
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down_conn::change_linerate(speed);
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rx::change_linerate(speed);
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up_conn::change_linerate(speed);
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tx::change_linerate(speed);
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}
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}
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mod up_conn {
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mod tx {
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use super::*;
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use super::*;
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pub fn setup() {
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pub fn setup() {
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unsafe {
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unsafe {
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csr::cxp_phys::upconn_tx_enable_write(1);
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csr::cxp_phys::tx_enable_write(1);
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}
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}
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}
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}
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@ -43,18 +43,18 @@ mod up_conn {
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unsafe {
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unsafe {
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match speed {
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match speed {
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CXP_SPEED::CXP_1 | CXP_SPEED::CXP_2 | CXP_SPEED::CXP_3 | CXP_SPEED::CXP_5 | CXP_SPEED::CXP_6 => {
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CXP_SPEED::CXP_1 | CXP_SPEED::CXP_2 | CXP_SPEED::CXP_3 | CXP_SPEED::CXP_5 | CXP_SPEED::CXP_6 => {
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csr::cxp_phys::upconn_bitrate2x_enable_write(0);
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csr::cxp_phys::tx_bitrate2x_enable_write(0);
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}
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}
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CXP_SPEED::CXP_10 | CXP_SPEED::CXP_12 => {
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CXP_SPEED::CXP_10 | CXP_SPEED::CXP_12 => {
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csr::cxp_phys::upconn_bitrate2x_enable_write(1);
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csr::cxp_phys::tx_bitrate2x_enable_write(1);
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}
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}
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};
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};
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csr::cxp_phys::upconn_clk_reset_write(1);
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csr::cxp_phys::tx_clk_reset_write(1);
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}
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}
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}
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}
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}
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}
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mod down_conn {
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mod rx {
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use super::*;
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use super::*;
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pub fn setup(timer: &mut GlobalTimer) {
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pub fn setup(timer: &mut GlobalTimer) {
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