forked from M-Labs/artiq-zynq
zc706 GW: update fn args
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a5d5471734
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@ -708,17 +708,17 @@ class CXP_FMC():
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cxp_csr_group = []
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cxp_mem_group = []
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cxp_downconns = []
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for i, (tx, rx) in enumerate(zip(cxp_phys.upconn.tx_phys, cxp_phys.downconn.rx_phys)):
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for i, phy in enumerate(cxp_phys.phys):
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cxp_name = "cxp" + str(i)
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if i == 0:
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cxp_interface = cxp.CXP_Master(tx, rx, debug_sma_pad, pmod_pads)
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cxp_interface = cxp.CXP_Master(phy, debug_sma_pad, pmod_pads)
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# Add rtlink for Master Connection only
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print("CoaXPress at RTIO channel 0x{:06x}".format(len(rtio_channels)))
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rtio_channels.append(rtio.Channel.from_phy(cxp_interface))
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else:
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cxp_interface = cxp.CXP_Extension(tx, rx, debug_sma_pad, pmod_pads)
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cxp_interface = cxp.CXP_Extension(phy, debug_sma_pad, pmod_pads)
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setattr(self.submodules, cxp_name, cxp_interface)
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self.csr_devices.append(cxp_name)
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