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downconn FW: add trig ack testing

This commit is contained in:
morgan 2024-09-19 14:41:30 +08:00
parent 610b53e7f7
commit 925237face
1 changed files with 20 additions and 15 deletions
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35
src/libboard_artiq/src/cxp_downconn.rs
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@ -37,36 +37,41 @@ pub fn loopback_testing(timer: &mut GlobalTimer, speed: CXP_SPEED) {
while csr::cxp::downconn_phy_rx_ready_read() != 1 {}
info!("rx ready!");
cxp_proto::downconn_debug_send_trig_ack();
cxp_proto::downconn_debug_send(&cxp_proto::Packet::CtrlRead {
addr: 0x00,
length: 0x04,
});
timer.delay_us(200); // wait packet has arrive at async fifo in
unsafe {
csr::cxp::downconn_phy_tx_stb_write(1);
timer.delay_us(200);
csr::cxp::downconn_phy_tx_stb_write(0);
}
csr::cxp::downconn_phy_tx_stb_write(1);
timer.delay_us(200);
csr::cxp::downconn_phy_tx_stb_write(0);
info!("trig ack = {}", csr::cxp::downconn_trig_ack_read());
csr::cxp::downconn_trig_clr_write(1);
info!("after clr trig ack = {}", csr::cxp::downconn_trig_ack_read());
// TODO: investigate how to make my packet appear
// TODO: discard idle word
// DEBUG: print loopback packets
const LEN: usize = 20;
let mut pak_arr: [u32; LEN] = [0; LEN];
let mut k_arr: [u8; LEN] = [0; LEN];
let mut i: usize = 0;
unsafe {
while csr::cxp::downconn_debug_out_dout_valid_read() == 1 {
pak_arr[i] = csr::cxp::downconn_debug_out_dout_pak_read();
// println!("received {:#04X}", pak_arr[i]);
csr::cxp::downconn_debug_out_inc_write(1);
i += 1;
if i == LEN {
break;
}
while csr::cxp::downconn_debug_out_dout_valid_read() == 1 {
pak_arr[i] = csr::cxp::downconn_debug_out_dout_pak_read();
k_arr[i] = csr::cxp::downconn_debug_out_kout_pak_read();
// println!("received {:#04X}", pak_arr[i]);
csr::cxp::downconn_debug_out_inc_write(1);
i += 1;
if i == LEN {
break;
}
}
cxp_proto::print_packetu32(&pak_arr)
cxp_proto::print_packetu32(&pak_arr, &k_arr);
}
}