Current limit pins are driven by PWM inputs to the MAX1968 driver, but
this is an implementation detail, and should not be exposed in the form
of the command interface. Rename "pwm" to "output" in all instances.
See M-Labs/thermostat#62 (comment).
Show in PwmSummary the set value, before all PWM duty calculations
instead of the machine value after the calculations. Also save the set
value into the flash store instead of the machine value.
Putting the maximum in PwmSummary has little use - the maximum never
changes throughout the runtime of the firmware and can be replaced by
documentation elsewhere.
Effectively flips all values related to the directionality of current
through the TEC, including current maximums. The reversed status is
stored in the flash store and will be loaded on reset once saved.
The command is "pwm <ch> polarity <normal/reversed>", where the "normal"
polarity is indicated by the front panel markings.
This is needed for IDC cable connections to the Sinara 5432 DAC
"Zotino", since the TEC pins of the 10-pin connector on the Thermostat
and Zotino have opposite polarities.
* Fix wrong calibration of VREF on startup. Caused new v2.2.2 boards to
wrongly calibrate the zero-point to ~2.2 V instead of 1.5 V.
* Fix bootloop on some boards.
* Adjust watchdog interval accordingly.
The REF pin of the MAX1968 on hardware revisions v2.x is missing a
buffer, loading the pin on every CPU ADC read. Avoid reading from it and
leave the pin floating on affected hardware revisions, and return the
nominal 1.5V instead.
Thermostats v2.2 and below have a noisy and offset feedback current
`tec_i` caused by missing hardware on 2 MAX1968 TEC driver pins:
1. A missing RC filter on the ITEC pin that would have isolated CPU
sampling pulses from the signal; and
2. Some missing buffering on the VREF pin that would have avoided
loading the VREF signal, preventing voltage drops from the nominal 1.5V.
Since the resulting signal `tec_i` derived from these two signals can
have an error of around +/- 100mA, and readback may affect the stability
performance of the Thermostat, disable current readback entirely on
affected hardware revisions for now.
See https://github.com/sinara-hw/Thermostat/issues/117 and
https://github.com/sinara-hw/Thermostat/issues/120.
On hardware revisions v3.x and above, this would be fixed.
Since VREF is an implementation detail, there shouldn't be a need to
include it in reports.
The ChannelState vref is removed along with it as its only use was to
save VREF measurements for later reporting.
Change the behaviour of LED L3 to turn off only when all channels have
PID disengaged, as opposed to when any channel disengages PID.
Otherwise, when disengaging PID on a Thermostat that has had both
channels engaged in PID, the LED would turn off, even when PID is still
engaged on the other channel.
This lets the LED better reflect the status of the Thermostat as a
whole, as it would stay on as long as PID is engaged on at least one
channel.
Rewrite of PID according to https://hackmd.io/IACbwcOTSt6Adj3_F9bKuw PID implementation.
To migrate:
- TEC+/- pin polarity has to be reversed.
- Some saved settings might be wiped upon flashing of new firmware, back up settings before upgrade
- Min / Max integral parameters no longer exist
- kp, ki, kd will likely need to be retuned
The software has been tested on hardware with good temperature control stability.
Reviewed-on: M-Labs/thermostat#68
Co-authored-by: topquark12 <aw@m-labs.hk>
Co-committed-by: topquark12 <aw@m-labs.hk>
