forked from M-Labs/artiq-zynq
drtio_proto: add allocate step for flashing
This avoids reallocation while transfering binaries.
This commit is contained in:
parent
ac6b7d5cf0
commit
4502a47aa6
@ -333,10 +333,14 @@ pub enum Packet {
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destination: u8,
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destination: u8,
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},
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},
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CoreMgmtFlashRequest {
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CoreMgmtFlashRequest {
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destination: u8,
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payload_length: u32,
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},
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CoreMgmtFlashAddDataRequest {
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destination: u8,
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destination: u8,
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last: bool,
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last: bool,
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length: u16,
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length: u16,
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data: [u8; MASTER_PAYLOAD_MAX_SIZE],
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data: [u8; MASTER_PAYLOAD_MAX_SIZE]
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},
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},
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CoreMgmtDropLinkAck {
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CoreMgmtDropLinkAck {
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destination: u8,
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destination: u8,
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@ -694,24 +698,28 @@ impl Packet {
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0xda => Packet::CoreMgmtAllocatorDebugRequest {
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0xda => Packet::CoreMgmtAllocatorDebugRequest {
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destination: reader.read_u8()?,
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destination: reader.read_u8()?,
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},
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},
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0xdb => {
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0xdb => Packet::CoreMgmtFlashRequest {
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destination: reader.read_u8()?,
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payload_length: reader.read_u32()?,
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},
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0xdc => {
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let destination = reader.read_u8()?;
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let destination = reader.read_u8()?;
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let last = reader.read_bool()?;
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let last = reader.read_bool()?;
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let length = reader.read_u16()?;
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let length = reader.read_u16()?;
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let mut data: [u8; MASTER_PAYLOAD_MAX_SIZE] = [0; MASTER_PAYLOAD_MAX_SIZE];
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let mut data: [u8; MASTER_PAYLOAD_MAX_SIZE] = [0; MASTER_PAYLOAD_MAX_SIZE];
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reader.read_exact(&mut data[0..length as usize])?;
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reader.read_exact(&mut data[0..length as usize])?;
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Packet::CoreMgmtFlashRequest {
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Packet::CoreMgmtFlashAddDataRequest {
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destination: destination,
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destination: destination,
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last: last,
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last: last,
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length: length,
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length: length,
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data: data,
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data: data,
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}
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}
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}
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}
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0xdc => Packet::CoreMgmtDropLinkAck {
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0xdd => Packet::CoreMgmtDropLinkAck {
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destination: reader.read_u8()?,
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destination: reader.read_u8()?,
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},
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},
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0xdd => Packet::CoreMgmtDropLink,
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0xde => Packet::CoreMgmtDropLink,
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0xde => {
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0xdf => {
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let last = reader.read_bool()?;
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let last = reader.read_bool()?;
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let length = reader.read_u16()?;
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let length = reader.read_u16()?;
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let mut data: [u8; SAT_PAYLOAD_MAX_SIZE] = [0; SAT_PAYLOAD_MAX_SIZE];
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let mut data: [u8; SAT_PAYLOAD_MAX_SIZE] = [0; SAT_PAYLOAD_MAX_SIZE];
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@ -722,7 +730,7 @@ impl Packet {
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data: data,
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data: data,
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}
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}
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}
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}
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0xdf => {
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0xe0 => {
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let last = reader.read_bool()?;
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let last = reader.read_bool()?;
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let length = reader.read_u16()?;
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let length = reader.read_u16()?;
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let mut value: [u8; SAT_PAYLOAD_MAX_SIZE] = [0; SAT_PAYLOAD_MAX_SIZE];
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let mut value: [u8; SAT_PAYLOAD_MAX_SIZE] = [0; SAT_PAYLOAD_MAX_SIZE];
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@ -733,7 +741,7 @@ impl Packet {
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value: value,
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value: value,
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}
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}
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}
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}
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0xe0 => Packet::CoreMgmtReply {
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0xe1 => Packet::CoreMgmtReply {
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succeeded: reader.read_bool()?,
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succeeded: reader.read_bool()?,
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},
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},
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@ -1182,37 +1190,42 @@ impl Packet {
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writer.write_u8(0xda)?;
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writer.write_u8(0xda)?;
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writer.write_u8(destination)?;
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writer.write_u8(destination)?;
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}
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}
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Packet::CoreMgmtFlashRequest {
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Packet::CoreMgmtFlashRequest { destination, payload_length } => {
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writer.write_u8(0xdb)?;
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writer.write_u8(destination)?;
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writer.write_u32(payload_length)?;
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}
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Packet::CoreMgmtFlashAddDataRequest {
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destination,
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destination,
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last,
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last,
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length,
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length,
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data,
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data,
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} => {
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} => {
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writer.write_u8(0xdb)?;
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writer.write_u8(0xdc)?;
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writer.write_u8(destination)?;
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writer.write_u8(destination)?;
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writer.write_bool(last)?;
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writer.write_bool(last)?;
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writer.write_u16(length)?;
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writer.write_u16(length)?;
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writer.write_all(&data[..length as usize])?;
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writer.write_all(&data[..length as usize])?;
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}
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}
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Packet::CoreMgmtDropLinkAck { destination } => {
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Packet::CoreMgmtDropLinkAck { destination } => {
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writer.write_u8(0xdc)?;
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writer.write_u8(0xdd)?;
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writer.write_u8(destination)?;
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writer.write_u8(destination)?;
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}
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}
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Packet::CoreMgmtDropLink => writer.write_u8(0xdd)?,
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Packet::CoreMgmtDropLink => writer.write_u8(0xde)?,
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Packet::CoreMgmtGetLogReply { last, length, data } => {
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Packet::CoreMgmtGetLogReply { last, length, data } => {
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writer.write_u8(0xde)?;
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writer.write_u8(0xdf)?;
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writer.write_bool(last)?;
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writer.write_bool(last)?;
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writer.write_u16(length)?;
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writer.write_u16(length)?;
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writer.write_all(&data[0..length as usize])?;
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writer.write_all(&data[0..length as usize])?;
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}
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}
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Packet::CoreMgmtConfigReadReply { last, length, value } => {
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Packet::CoreMgmtConfigReadReply { last, length, value } => {
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writer.write_u8(0xdf)?;
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writer.write_u8(0xe0)?;
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writer.write_bool(last)?;
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writer.write_bool(last)?;
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writer.write_u16(length)?;
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writer.write_u16(length)?;
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writer.write_all(&value[0..length as usize])?;
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writer.write_all(&value[0..length as usize])?;
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}
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}
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Packet::CoreMgmtReply { succeeded } => {
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Packet::CoreMgmtReply { succeeded } => {
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writer.write_u8(0xe0)?;
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writer.write_u8(0xe1)?;
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writer.write_bool(succeeded)?;
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writer.write_bool(succeeded)?;
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}
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}
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}
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}
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@ -640,6 +640,31 @@ mod remote_coremgmt {
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) -> Result<()> {
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) -> Result<()> {
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let mut image = &image[..];
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let mut image = &image[..];
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let alloc_reply = drtio::aux_transact(
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aux_mutex,
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linkno,
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routing_table,
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&Packet::CoreMgmtFlashRequest {
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destination: destination,
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payload_length: image.len() as u32,
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},
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timer,
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).await;
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match alloc_reply {
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Ok(Packet::CoreMgmtReply { succeeded: true }) => Ok(()),
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Ok(packet) => {
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error!("received unexpected aux packet: {:?}", packet);
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write_i8(stream, Reply::Error as i8).await?;
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Err(drtio::Error::UnexpectedReply)
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}
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Err(e) => {
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error!("aux packet error ({})", e);
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write_i8(stream, Reply::Error as i8).await?;
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Err(drtio::Error::AuxError)
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}
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}?;
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while !image.is_empty() {
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while !image.is_empty() {
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let mut data = [0; MASTER_PAYLOAD_MAX_SIZE];
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let mut data = [0; MASTER_PAYLOAD_MAX_SIZE];
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let len = image.read(&mut data).unwrap();
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let len = image.read(&mut data).unwrap();
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@ -649,7 +674,7 @@ mod remote_coremgmt {
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aux_mutex,
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aux_mutex,
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linkno,
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linkno,
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routing_table,
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routing_table,
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&Packet::CoreMgmtFlashRequest {
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&Packet::CoreMgmtFlashAddDataRequest {
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destination: destination,
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destination: destination,
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last: last,
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last: last,
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length: len as u16,
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length: len as u16,
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@ -1281,6 +1281,24 @@ fn process_aux_packet(
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded: false })
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded: false })
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}
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}
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drtioaux::Packet::CoreMgmtFlashRequest {
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drtioaux::Packet::CoreMgmtFlashRequest {
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destination: _destination,
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payload_length
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} => {
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forward!(
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router,
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_routing_table,
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_destination,
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*rank,
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*self_destination,
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_repeaters,
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&packet,
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timer
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);
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core_manager.allocate_image_buffer(payload_length as usize);
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded: true })
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}
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drtioaux::Packet::CoreMgmtFlashAddDataRequest {
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destination: _destination,
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destination: _destination,
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last,
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last,
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length,
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length,
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@ -115,6 +115,10 @@ impl<'a> Manager<'_> {
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.map_err(|err| warn!("failed to erase: {:?}", err))
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.map_err(|err| warn!("failed to erase: {:?}", err))
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}
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}
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pub fn allocate_image_buffer(&mut self, image_size: usize) {
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self.image_payload = Vec::with_capacity(image_size);
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}
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pub fn add_image_data(&mut self, data: &[u8], data_len: usize) {
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pub fn add_image_data(&mut self, data: &[u8], data_len: usize) {
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self.image_payload.extend(&data[..data_len]);
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self.image_payload.extend(&data[..data_len]);
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}
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}
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