404 lines
13 KiB
Rust
404 lines
13 KiB
Rust
use super::hal;
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use embedded_hal::{adc::OneShot, blocking::spi::Transfer};
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use serde::{Deserialize, Serialize};
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pub mod attenuators;
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pub mod dds_output;
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pub mod hrtimer;
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pub mod rf_power;
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#[cfg(feature = "pounder_v1_1")]
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pub mod timestamp;
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pub enum GpioPin {
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Led4Green = 0,
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Led5Red = 1,
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Led6Green = 2,
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Led7Red = 3,
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Led8Green = 4,
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Led9Red = 5,
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AttLe0 = 8,
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AttLe1 = 8 + 1,
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AttLe2 = 8 + 2,
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AttLe3 = 8 + 3,
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AttRstN = 8 + 5,
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OscEnN = 8 + 6,
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ExtClkSel = 8 + 7,
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}
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#[derive(Debug, Copy, Clone)]
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pub enum Error {
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Spi,
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I2c,
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Qspi,
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Bounds,
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InvalidAddress,
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InvalidChannel,
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Adc,
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}
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/// The numerical value (discriminant) of the Channel enum is the index in the attenuator shift
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/// register as well as the attenuator latch enable signal index on the GPIO extender.
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#[derive(Debug, Copy, Clone)]
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#[allow(dead_code)]
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pub enum Channel {
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In0 = 0,
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Out0 = 1,
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In1 = 2,
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Out1 = 3,
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}
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#[derive(Serialize, Deserialize, Copy, Clone, Debug)]
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pub struct DdsChannelState {
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pub phase_offset: f32,
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pub frequency: f32,
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pub amplitude: f32,
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pub enabled: bool,
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}
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#[derive(Serialize, Deserialize, Copy, Clone, Debug)]
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pub struct ChannelState {
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pub parameters: DdsChannelState,
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pub attenuation: f32,
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}
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#[derive(Serialize, Deserialize, Copy, Clone, Debug)]
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pub struct InputChannelState {
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pub attenuation: f32,
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pub power: f32,
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pub mixer: DdsChannelState,
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}
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#[derive(Serialize, Deserialize, Copy, Clone, Debug)]
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pub struct OutputChannelState {
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pub attenuation: f32,
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pub channel: DdsChannelState,
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}
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#[derive(Serialize, Deserialize, Copy, Clone, Debug)]
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pub struct DdsClockConfig {
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pub multiplier: u8,
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pub reference_clock: f32,
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pub external_clock: bool,
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}
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impl From<Channel> for ad9959::Channel {
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/// Translate pounder channels to DDS output channels.
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fn from(other: Channel) -> Self {
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match other {
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Channel::In0 => Self::Two,
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Channel::In1 => Self::Four,
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Channel::Out0 => Self::One,
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Channel::Out1 => Self::Three,
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}
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}
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}
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/// A structure for the QSPI interface for the DDS.
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pub struct QspiInterface {
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pub qspi: hal::qspi::Qspi,
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mode: ad9959::Mode,
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streaming: bool,
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}
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impl QspiInterface {
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/// Initialize the QSPI interface.
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///
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/// Args:
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/// * `qspi` - The QSPI peripheral driver.
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pub fn new(mut qspi: hal::qspi::Qspi) -> Result<Self, Error> {
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// This driver only supports operation in 4-bit mode due to bus inconsistencies between the
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// QSPI peripheral and the DDS. Instead, we will bit-bang communications in
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// single-bit-two-wire to the DDS to configure it to 4-bit operation.
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qspi.configure_mode(hal::qspi::QspiMode::FourBit)
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.map_err(|_| Error::Qspi)?;
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Ok(Self {
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qspi,
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mode: ad9959::Mode::SingleBitTwoWire,
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streaming: false,
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})
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}
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pub fn start_stream(&mut self) -> Result<(), Error> {
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if self.qspi.is_busy() {
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return Err(Error::Qspi);
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}
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// Configure QSPI for infinite transaction mode using only a data phase (no instruction or
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// address).
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let qspi_regs = unsafe { &*hal::stm32::QUADSPI::ptr() };
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qspi_regs.fcr.modify(|_, w| w.ctcf().set_bit());
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unsafe {
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qspi_regs.dlr.write(|w| w.dl().bits(0xFFFF_FFFF));
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qspi_regs.ccr.modify(|_, w| {
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w.imode().bits(0).fmode().bits(0).admode().bits(0)
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});
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}
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self.streaming = true;
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Ok(())
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}
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}
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impl ad9959::Interface for QspiInterface {
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type Error = Error;
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/// Configure the operations mode of the interface.
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///
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/// Args:
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/// * `mode` - The newly desired operational mode.
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fn configure_mode(&mut self, mode: ad9959::Mode) -> Result<(), Error> {
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self.mode = mode;
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Ok(())
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}
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/// Write data over QSPI to the DDS.
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///
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/// Args:
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/// * `addr` - The address to write over QSPI to the DDS.
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/// * `data` - The data to write.
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fn write(&mut self, addr: u8, data: &[u8]) -> Result<(), Error> {
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if (addr & 0x80) != 0 {
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return Err(Error::InvalidAddress);
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}
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// The QSPI interface implementation always operates in 4-bit mode because the AD9959 uses
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// IO3 as SYNC_IO in some output modes. In order for writes to be successful, SYNC_IO must
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// be driven low. However, the QSPI peripheral forces IO3 high when operating in 1 or 2 bit
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// modes. As a result, any writes while in single- or dual-bit modes has to instead write
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// the data encoded into 4-bit QSPI data so that IO3 can be driven low.
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match self.mode {
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ad9959::Mode::SingleBitTwoWire => {
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// Encode the data into a 4-bit QSPI pattern.
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// In 4-bit mode, we can send 2 bits of address and data per byte transfer. As
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// such, we need at least 4x more bytes than the length of data. To avoid dynamic
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// allocation, we assume the maximum transaction length for single-bit-two-wire is
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// 2 bytes.
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let mut encoded_data: [u8; 12] = [0; 12];
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if (data.len() * 4) > (encoded_data.len() - 4) {
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return Err(Error::Bounds);
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}
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// Encode the address into the first 4 bytes.
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for address_bit in 0..8 {
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let offset: u8 = {
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if address_bit % 2 != 0 {
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4
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} else {
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0
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}
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};
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// Encode MSB first. Least significant bits are placed at the most significant
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// byte.
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let byte_position = 3 - (address_bit >> 1) as usize;
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if addr & (1 << address_bit) != 0 {
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encoded_data[byte_position] |= 1 << offset;
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}
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}
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// Encode the data into the remaining bytes.
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for byte_index in 0..data.len() {
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let byte = data[byte_index];
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for bit in 0..8 {
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let offset: u8 = {
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if bit % 2 != 0 {
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4
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} else {
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0
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}
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};
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// Encode MSB first. Least significant bits are placed at the most
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// significant byte.
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let byte_position = 3 - (bit >> 1) as usize;
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if byte & (1 << bit) != 0 {
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encoded_data
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[(byte_index + 1) * 4 + byte_position] |=
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1 << offset;
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}
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}
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}
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let (encoded_address, encoded_payload) = {
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let end_index = (1 + data.len()) * 4;
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(encoded_data[0], &encoded_data[1..end_index])
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};
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self.qspi
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.write(encoded_address.into(), encoded_payload)
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.map_err(|_| Error::Qspi)
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}
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ad9959::Mode::FourBitSerial => {
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if self.streaming {
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Err(Error::Qspi)
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} else {
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self.qspi
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.write(addr.into(), data)
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.map_err(|_| Error::Qspi)?;
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Ok(())
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}
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}
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_ => Err(Error::Qspi),
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}
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}
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fn read(&mut self, addr: u8, dest: &mut [u8]) -> Result<(), Error> {
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if (addr & 0x80) != 0 {
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return Err(Error::InvalidAddress);
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}
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// This implementation only supports operation (read) in four-bit-serial mode.
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if self.mode != ad9959::Mode::FourBitSerial {
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return Err(Error::Qspi);
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}
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self.qspi
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.read((0x80_u8 | addr).into(), dest)
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.map_err(|_| Error::Qspi)
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}
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}
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/// A structure containing implementation for Pounder hardware.
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pub struct PounderDevices {
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mcp23017: mcp23017::MCP23017<hal::i2c::I2c<hal::stm32::I2C1>>,
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attenuator_spi: hal::spi::Spi<hal::stm32::SPI1, hal::spi::Enabled, u8>,
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adc1: hal::adc::Adc<hal::stm32::ADC1, hal::adc::Enabled>,
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adc2: hal::adc::Adc<hal::stm32::ADC2, hal::adc::Enabled>,
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adc1_in_p: hal::gpio::gpiof::PF11<hal::gpio::Analog>,
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adc2_in_p: hal::gpio::gpiof::PF14<hal::gpio::Analog>,
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}
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impl PounderDevices {
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/// Construct and initialize pounder-specific hardware.
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///
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/// Args:
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/// * `attenuator_spi` - A SPI interface to control digital attenuators.
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/// * `adc1` - The ADC1 peripheral for measuring power.
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/// * `adc2` - The ADC2 peripheral for measuring power.
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/// * `adc1_in_p` - The input channel for the RF power measurement on IN0.
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/// * `adc2_in_p` - The input channel for the RF power measurement on IN1.
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pub fn new(
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mcp23017: mcp23017::MCP23017<hal::i2c::I2c<hal::stm32::I2C1>>,
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attenuator_spi: hal::spi::Spi<hal::stm32::SPI1, hal::spi::Enabled, u8>,
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adc1: hal::adc::Adc<hal::stm32::ADC1, hal::adc::Enabled>,
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adc2: hal::adc::Adc<hal::stm32::ADC2, hal::adc::Enabled>,
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adc1_in_p: hal::gpio::gpiof::PF11<hal::gpio::Analog>,
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adc2_in_p: hal::gpio::gpiof::PF14<hal::gpio::Analog>,
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) -> Result<Self, Error> {
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let mut devices = Self {
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mcp23017,
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attenuator_spi,
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adc1,
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adc2,
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adc1_in_p,
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adc2_in_p,
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};
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// Configure power-on-default state for pounder. All LEDs are off, on-board oscillator
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// selected and enabled, attenuators out of reset. Note that testing indicates the
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// output state needs to be set first to properly update the output registers.
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devices
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.mcp23017
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.all_pin_mode(mcp23017::PinMode::OUTPUT)
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.map_err(|_| Error::I2c)?;
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devices
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.mcp23017
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.write_gpio(mcp23017::Port::GPIOA, 0x00)
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.map_err(|_| Error::I2c)?;
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devices
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.mcp23017
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.write_gpio(mcp23017::Port::GPIOB, 0x2F)
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.map_err(|_| Error::I2c)?;
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Ok(devices)
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}
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}
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impl attenuators::AttenuatorInterface for PounderDevices {
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/// Reset all of the attenuators to a power-on default state.
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fn reset_attenuators(&mut self) -> Result<(), Error> {
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self.mcp23017
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.write_gpio(mcp23017::Port::GPIOB, 0x0f)
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.map_err(|_| Error::I2c)?;
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// Duration of one I2C transaction is sufficiently long.
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self.mcp23017
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.write_gpio(mcp23017::Port::GPIOB, 0x2f)
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.map_err(|_| Error::I2c)?;
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Ok(())
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}
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/// Latch a configuration into a digital attenuator.
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///
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/// Args:
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/// * `channel` - The attenuator channel to latch.
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fn latch_attenuator(&mut self, channel: Channel) -> Result<(), Error> {
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let pin = channel as u8;
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self.mcp23017
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.write_gpio(mcp23017::Port::GPIOB, 0x2f & !(1 << pin))
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.map_err(|_| Error::I2c)?;
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// Duration of one I2C transaction is sufficiently long.
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self.mcp23017
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.write_gpio(mcp23017::Port::GPIOB, 0x2f)
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.map_err(|_| Error::I2c)?;
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Ok(())
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}
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/// Read the raw attenuation codes stored in the attenuator shift registers.
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///
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/// Args:
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/// * `channels` - A 4 byte slice to be shifted into the
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/// attenuators and to contain the data shifted out.
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fn transfer_attenuators(
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&mut self,
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channels: &mut [u8; 4],
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) -> Result<(), Error> {
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self.attenuator_spi
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.transfer(channels)
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.map_err(|_| Error::Spi)?;
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Ok(())
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}
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}
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impl rf_power::PowerMeasurementInterface for PounderDevices {
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/// Sample an ADC channel.
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///
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/// Args:
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/// * `channel` - The channel to sample.
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///
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/// Returns:
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/// The sampled voltage of the specified channel.
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fn sample_converter(&mut self, channel: Channel) -> Result<f32, Error> {
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let adc_scale = match channel {
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Channel::In0 => {
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let adc_reading: u32 = self
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.adc1
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.read(&mut self.adc1_in_p)
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.map_err(|_| Error::Adc)?;
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adc_reading as f32 / self.adc1.max_sample() as f32
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}
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Channel::In1 => {
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let adc_reading: u32 = self
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.adc2
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.read(&mut self.adc2_in_p)
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.map_err(|_| Error::Adc)?;
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adc_reading as f32 / self.adc2.max_sample() as f32
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}
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_ => return Err(Error::InvalidChannel),
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};
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// Convert analog percentage to voltage. Note that the ADC uses an external 2.048V analog
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// reference.
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Ok(adc_scale * 2.048)
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}
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}
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