Cleaning up conversion + comments

src/bin/dual-iir.rs

@@ -26,8 +26,6 @@ pub struct Settings {
     iir_ch: [[iir::IIR; IIR_CASCADE_LENGTH]; 2],
     allow_hold: bool,
     force_hold: bool,
-
-    // The telemetry period in seconds.
     telemetry_period: u16,
 }
 
@@ -46,6 +44,7 @@ impl Default for Settings {
             allow_hold: false,
             // Force suppress filter output updates.
             force_hold: false,
+            // The default telemetry period in seconds.
             telemetry_period: 10,
         }
     }

src/bin/lockin.rs

@@ -56,8 +56,6 @@ pub struct Settings {
     lockin_phase: i32,
 
     output_conf: [Conf; 2],
-
-    // The telemetry period in seconds.
     telemetry_period: u16,
 }
 
@@ -75,6 +73,7 @@ impl Default for Settings {
             lockin_phase: 0,     // Demodulation LO phase offset
 
             output_conf: [Conf::InPhase, Conf::Quadrature],
+            // The default telemetry period in seconds.
             telemetry_period: 10,
         }
     }

src/hardware/adc.rs

@@ -92,14 +92,10 @@ impl Into<f32> for AdcCode {
     /// Convert raw ADC codes to/from voltage levels.
     ///
     /// # Note
-    ///
     /// This does not account for the programmable gain amplifier at the signal input.
     fn into(self) -> f32 {
-        // The input voltage is measured by the ADC across a dynamic scale of +/- 4.096 V with a
+        // The ADC has a differential input with a range of +/- 4.096 V and 16-bit resolution.
-        // dynamic range across signed integers. Additionally, the signal is fully differential, so
+        // The gain into the two inputs is 1/5.
-        // the differential voltage is measured at the ADC. Thus, the single-ended signal is
-        // measured at the input is half of the ADC-reported measurement. As a pre-filter, the
-        // input signal has a fixed gain of 1/5 through a static input active filter.
         let adc_volts_per_lsb = 5.0 / 2.0 * 4.096 / i16::MAX as f32;
 
         (self.0 as i16) as f32 * adc_volts_per_lsb

src/hardware/dac.rs

@@ -76,28 +76,16 @@ pub struct DacCode(pub u16);
 
 impl Into<f32> for DacCode {
     fn into(self) -> f32 {
-        // The output voltage is generated by the DAC with an output range of +/- 4.096 V. This
+        // The DAC output range in bipolar mode (including the external output op-amp) is +/- 4.096
-        // signal then passes through a 2.5x gain stage. Note that the DAC operates using unsigned
+        // V with 16-bit resolution. The anti-aliasing filter has an additional gain of 2.5.
-        // integers, and u16::MAX / 2 is considered zero voltage output. Thus, the dynamic range of
-        // the output stage is +/- 10.24 V. At a DAC code of zero, there is an output of -10.24 V,
-        // and at a max DAC code, there is an output of (slightly less than) 10.24 V.
-
         let dac_volts_per_lsb = 4.096 * 2.5 / (1u16 << 15) as f32;
 
-        // Note that the bipolar table is an offset-binary code, but it is much more logical and
-        // correct to treat it as a twos-complement value. TO do that, we XOR the most significant
-        // bit to convert it.
         (self.0 ^ 0x8000) as i16 as f32 * dac_volts_per_lsb
     }
 }
 
 impl From<i16> for DacCode {
-    /// Generate a DAC code from a 16-bit signed value.
+    /// Encode signed 16-bit values into DAC offset binary for a bipolar output configuration.
-    ///
-    /// # Note
-    /// This is provided as a means to convert between the DACs internal 16-bit, unsigned register
-    /// and a 2s-complement integer that is convenient when using the DAC in the bipolar
-    /// configuration.
     fn from(value: i16) -> Self {
         Self(value as u16 ^ 0x8000)
     }