add lockin bin
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@ -14,8 +14,22 @@ use heapless::{consts::*, String};
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use stabilizer::{hardware, server};
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use stabilizer::{hardware, server};
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use dsp::iir;
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use dsp::{
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use hardware::{Adc0Input, Adc1Input, Dac0Output, Dac1Output, AFE0, AFE1};
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iir, iir_int,
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reciprocal_pll::TimestampHandler,
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trig::{atan2, cossin},
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Complex,
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};
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use hardware::{
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Adc0Input, Adc1Input, Dac0Output, Dac1Output, InputStamper, AFE0, AFE1,
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};
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// Frequency scaling factor for lock-in harmonic demodulation.
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const HARMONIC: u32 = 1;
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// Phase offset applied to the lock-in demodulation signal.
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const PHASE_OFFSET: u32 = 0;
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const ADC_SAMPLE_TICKS_LOG2: u16 = 8;
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const SAMPLE_BUFFER_SIZE_LOG2: usize = 3;
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const SCALE: f32 = ((1 << 15) - 1) as f32;
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const SCALE: f32 = ((1 << 15) - 1) as f32;
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@ -38,6 +52,11 @@ const APP: () = {
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iir_state: [[iir::IIRState; IIR_CASCADE_LENGTH]; 2],
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iir_state: [[iir::IIRState; IIR_CASCADE_LENGTH]; 2],
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#[init([[iir::IIR { ba: [1., 0., 0., 0., 0.], y_offset: 0., y_min: -SCALE - 1., y_max: SCALE }; IIR_CASCADE_LENGTH]; 2])]
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#[init([[iir::IIR { ba: [1., 0., 0., 0., 0.], y_offset: 0., y_min: -SCALE - 1., y_max: SCALE }; IIR_CASCADE_LENGTH]; 2])]
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iir_ch: [[iir::IIR; IIR_CASCADE_LENGTH]; 2],
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iir_ch: [[iir::IIR; IIR_CASCADE_LENGTH]; 2],
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timestamper: InputStamper,
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timestamp_handler: TimestampHandler,
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iir_lockin: iir_int::IIR,
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iir_state_lockin: [iir_int::IIRState; 2],
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}
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}
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#[init]
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#[init]
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@ -45,6 +64,15 @@ const APP: () = {
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// Configure the microcontroller
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// Configure the microcontroller
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let (mut stabilizer, _pounder) = hardware::setup(c.core, c.device);
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let (mut stabilizer, _pounder) = hardware::setup(c.core, c.device);
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let timestamp_handler = TimestampHandler::new(
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4,
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3,
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ADC_SAMPLE_TICKS_LOG2 as usize,
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SAMPLE_BUFFER_SIZE_LOG2,
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);
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let iir_lockin = iir_int::IIR::default();
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let iir_state_lockin = [iir_int::IIRState::default(); 2];
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// Enable ADC/DAC events
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// Enable ADC/DAC events
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stabilizer.adcs.0.start();
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stabilizer.adcs.0.start();
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stabilizer.adcs.1.start();
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stabilizer.adcs.1.start();
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@ -59,6 +87,11 @@ const APP: () = {
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adcs: stabilizer.adcs,
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adcs: stabilizer.adcs,
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dacs: stabilizer.dacs,
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dacs: stabilizer.dacs,
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net_interface: stabilizer.net.interface,
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net_interface: stabilizer.net.interface,
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timestamper: stabilizer.timestamper,
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timestamp_handler,
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iir_lockin,
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iir_state_lockin,
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}
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}
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}
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}
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@ -78,7 +111,7 @@ const APP: () = {
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///
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///
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/// Because the ADC and DAC operate at the same rate, these two constraints actually implement
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/// Because the ADC and DAC operate at the same rate, these two constraints actually implement
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/// the same time bounds, meeting one also means the other is also met.
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/// the same time bounds, meeting one also means the other is also met.
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#[task(binds=DMA1_STR4, resources=[adcs, dacs, iir_state, iir_ch], priority=2)]
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#[task(binds=DMA1_STR4, resources=[adcs, dacs, iir_state, iir_ch, iir_lockin, iir_state_lockin, timestamp_handler, timestamper], priority=2)]
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fn process(c: process::Context) {
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fn process(c: process::Context) {
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let adc_samples = [
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let adc_samples = [
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c.resources.adcs.0.acquire_buffer(),
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c.resources.adcs.0.acquire_buffer(),
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@ -98,7 +131,7 @@ const APP: () = {
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let (pll_phase, pll_frequency) = c
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let (pll_phase, pll_frequency) = c
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.resources
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.resources
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.timestamp_handler
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.timestamp_handler
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.update(c.resources.input_stamper.latest_timestamp());
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.update(c.resources.timestamper.latest_timestamp());
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let frequency = pll_frequency.wrapping_mul(HARMONIC);
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let frequency = pll_frequency.wrapping_mul(HARMONIC);
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let mut phase =
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let mut phase =
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PHASE_OFFSET.wrapping_add(pll_phase.wrapping_mul(HARMONIC));
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PHASE_OFFSET.wrapping_add(pll_phase.wrapping_mul(HARMONIC));
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@ -20,6 +20,7 @@ mod timers;
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pub use adc::{Adc0Input, Adc1Input};
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pub use adc::{Adc0Input, Adc1Input};
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pub use afe::Gain as AfeGain;
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pub use afe::Gain as AfeGain;
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pub use dac::{Dac0Output, Dac1Output};
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pub use dac::{Dac0Output, Dac1Output};
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pub use digital_input_stamper::InputStamper;
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pub use pounder::DdsOutput;
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pub use pounder::DdsOutput;
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// Type alias for the analog front-end (AFE) for ADC0.
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// Type alias for the analog front-end (AFE) for ADC0.
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