lockin: fix adc value conversion
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41a907a4bf
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c078de05cc
@ -59,18 +59,19 @@ impl Lockin {
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self.phase.wrapping_add(phase.wrapping_mul(self.harmonic));
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self.phase.wrapping_add(phase.wrapping_mul(self.harmonic));
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let mut last = Complex::default();
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let mut last = Complex::default();
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for s in input.iter() {
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for &s in input.iter() {
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let m = cossin((phase as i32).wrapping_neg());
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let m = cossin((phase as i32).wrapping_neg());
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phase = phase.wrapping_add(frequency);
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phase = phase.wrapping_add(frequency);
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let signal = (s as i32) << 16;
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last = Complex(
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last = Complex(
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self.iir.update(
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self.iir.update(
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&mut self.iir_state[0],
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&mut self.iir_state[0],
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((*s as i64 * m.0 as i64) >> 16) as i32,
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((signal as i64 * m.0 as i64) >> 32) as i32,
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),
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),
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self.iir.update(
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self.iir.update(
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&mut self.iir_state[1],
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&mut self.iir_state[1],
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((*s as i64 * m.1 as i64) >> 16) as i32,
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((signal as i64 * m.1 as i64) >> 32) as i32,
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),
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),
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);
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);
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}
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}
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@ -140,14 +140,13 @@ const APP: () = {
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let m = cossin((phase as i32).wrapping_neg());
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let m = cossin((phase as i32).wrapping_neg());
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phase = phase.wrapping_add(frequency);
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phase = phase.wrapping_add(frequency);
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let signal = (adc_samples[0][i] as i16 as i32) << 16;
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let signal = Complex(
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let signal = Complex(
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iir_lockin.update(
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iir_lockin.update(
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&mut iir_state_lockin[0],
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&mut iir_state_lockin[0], ((signal as i64 * m.0 as i64) >> 32) as _,
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((adc_samples[0][i] as i64 * m.0 as i64) >> 16) as _,
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),
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),
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iir_lockin.update(
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iir_lockin.update(
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&mut iir_state_lockin[1],
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&mut iir_state_lockin[1], ((signal as i64 * m.1 as i64) >> 16) as _,
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((adc_samples[0][i] as i64 * m.1 as i64) >> 16) as _,
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),
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),
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);
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);
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