Finalizing merge
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8c581ea0a6
commit
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3
.github/workflows/release.yml
vendored
3
.github/workflows/release.yml
vendored
@ -24,8 +24,7 @@ jobs:
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- run: >
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- run: >
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zip bin.zip
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zip bin.zip
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target/*/release/dual-iir
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target/*/release/dual-iir
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target/*/release/lockin-external
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target/*/release/lockin
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target/*/release/lockin-internal
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- id: create_release
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- id: create_release
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uses: actions/create-release@v1
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uses: actions/create-release@v1
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env:
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env:
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@ -22,16 +22,20 @@ use net::{NetworkUsers, Telemetry, TelemetryBuffer, UpdateState};
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// A constant sinusoid to send on the DAC output.
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// A constant sinusoid to send on the DAC output.
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// Full-scale gives a +/- 10.24V amplitude waveform. Scale it down to give +/- 1V.
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// Full-scale gives a +/- 10.24V amplitude waveform. Scale it down to give +/- 1V.
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const ONE: i16 = ((1.0 / 10.24) * u16::MAX as f32) as _;
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const ONE: i16 = ((1.0 / 10.24) * i16::MAX as f32) as _;
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const SQRT2: i16 = (ONE as f32 * 0.707) as _;
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const SQRT2: i16 = (ONE as f32 * 0.707) as _;
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const DAC_SEQUENCE: [i16; design_parameters::SAMPLE_BUFFER_SIZE] =
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const DAC_SEQUENCE: [i16; design_parameters::SAMPLE_BUFFER_SIZE] =
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[ONE, SQRT2, 0, -SQRT2, -ONE, -SQRT2, 0, SQRT2];
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[ONE, SQRT2, 0, -SQRT2, -ONE, -SQRT2, 0, SQRT2];
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#[derive(Copy, Clone, Debug, Deserialize, Miniconf)]
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#[derive(Copy, Clone, Debug, Deserialize, Miniconf)]
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enum Conf {
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enum Conf {
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PowerPhase,
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Magnitude,
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FrequencyDiscriminator,
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Phase,
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PllFrequency,
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LogPower,
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InPhase,
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Quadrature,
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Quadrature,
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Modulation,
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}
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}
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#[derive(Copy, Clone, Debug, Miniconf, Deserialize, PartialEq)]
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#[derive(Copy, Clone, Debug, Miniconf, Deserialize, PartialEq)]
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@ -68,7 +72,7 @@ impl Default for Settings {
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lockin_harmonic: -1, // Harmonic index of the LO: -1 to _de_modulate the fundamental (complex conjugate)
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lockin_harmonic: -1, // Harmonic index of the LO: -1 to _de_modulate the fundamental (complex conjugate)
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lockin_phase: 0, // Demodulation LO phase offset
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lockin_phase: 0, // Demodulation LO phase offset
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output_conf: [Conf::Quadrature; 2],
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output_conf: [Conf::InPhase, Conf::Quadrature],
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telemetry_period_secs: 10,
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telemetry_period_secs: 10,
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}
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}
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}
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}
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@ -159,7 +163,7 @@ const APP: () = {
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c.resources.adcs.1.acquire_buffer(),
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c.resources.adcs.1.acquire_buffer(),
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];
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];
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let dac_samples = [
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let mut dac_samples = [
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c.resources.dacs.0.acquire_buffer(),
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c.resources.dacs.0.acquire_buffer(),
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c.resources.dacs.1.acquire_buffer(),
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c.resources.dacs.1.acquire_buffer(),
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];
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];
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@ -225,29 +229,21 @@ const APP: () = {
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.unwrap()
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.unwrap()
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* 2; // Full scale assuming the 2f component is gone.
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* 2; // Full scale assuming the 2f component is gone.
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let output = [
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match settings.output_conf[0] {
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Conf::PowerPhase => output.abs_sqr() as _,
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Conf::FrequencyDiscriminator => (output.log2() << 24) as _,
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Conf::Quadrature => output.re,
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},
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match settings.output_conf[1] {
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Conf::PowerPhase => output.arg(),
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Conf::FrequencyDiscriminator => pll_frequency as _,
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Conf::Quadrature => output.im,
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},
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];
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// Convert to DAC data.
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// Convert to DAC data.
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for i in 0..dac_samples[0].len() {
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for (channel, samples) in dac_samples.iter_mut().enumerate() {
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// When operating in internal lockin mode, DAC0 is always used for generating the
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for (i, sample) in samples.iter_mut().enumerate() {
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// reference signal.
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let value = match settings.output_conf[channel] {
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if settings.lockin_mode == LockinMode::Internal {
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Conf::Magnitude => output.abs_sqr() as i32 >> 16,
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dac_samples[0][i] = DAC_SEQUENCE[i] as u16 ^ 0x8000;
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Conf::Phase => output.arg() >> 16,
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} else {
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Conf::LogPower => (output.log2() << 24) as i32 >> 16,
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dac_samples[0][i] = (output[0] >> 16) as u16 ^ 0x8000;
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Conf::PllFrequency => pll_frequency as i32 >> 16,
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Conf::InPhase => output.re >> 16,
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Conf::Quadrature => output.im >> 16,
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Conf::Modulation => DAC_SEQUENCE[i] as i32,
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};
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*sample = value as u16 ^ 0x8000;
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}
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}
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dac_samples[1][i] = (output[1] >> 16) as u16 ^ 0x8000;
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}
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}
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// Update telemetry measurements.
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// Update telemetry measurements.
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