clean dcache
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9350f17ca3
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@ -420,7 +420,10 @@ fn main() -> ! {
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rcc.ahb1enr.modify(|_, w| w.dma1en().set_bit());
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rcc.ahb1enr.modify(|_, w| w.dma1en().set_bit());
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unsafe { DAT = (1 << 9) | (1 << 0) }; // init SRAM1 rodata can't load with sram1 disabled
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unsafe { DAT = (1 << 9) | (1 << 0) }; // init SRAM1 rodata can't load with sram1 disabled
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cortex_m::asm::dsb();
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cortex_m::asm::dsb();
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dma1_setup(&dp.DMA1, &dp.DMAMUX1, unsafe { &DAT as *const _ } as usize,
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let dat_addr = unsafe { &DAT as *const _ } as usize;
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cp.SCB.clean_dcache_by_address(dat_addr, 4);
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dma1_setup(&dp.DMA1, &dp.DMAMUX1, dat_addr,
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&spi1.cr1 as *const _ as usize);
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&spi1.cr1 as *const _ as usize);
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rcc.apb1lenr.modify(|_, w| w.tim2en().set_bit());
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rcc.apb1lenr.modify(|_, w| w.tim2en().set_bit());
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