Merge pull request #258 from vertigo-designs/feature/input-capture-fixes
Updating input capture for timers
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commit
5945cfca75
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@ -71,6 +71,9 @@ const APP: () = {
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// Start sampling ADCs.
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// Start sampling ADCs.
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stabilizer.adc_dac_timer.start();
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stabilizer.adc_dac_timer.start();
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// Enable the timestamper.
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stabilizer.timestamper.start();
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init::LateResources {
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init::LateResources {
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afes: stabilizer.afes,
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afes: stabilizer.afes,
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adcs: stabilizer.adcs,
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adcs: stabilizer.adcs,
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@ -45,7 +45,7 @@ impl InputStamper {
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// Utilize the TIM5 CH4 as an input capture channel - use TI4 (the DI0 input trigger) as the
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// Utilize the TIM5 CH4 as an input capture channel - use TI4 (the DI0 input trigger) as the
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// capture source.
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// capture source.
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let input_capture =
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let input_capture =
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timer_channel.into_input_capture(timers::CaptureTrigger::Input24);
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timer_channel.into_input_capture(timers::tim5::CaptureSource4::TI4);
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Self {
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Self {
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capture_channel: input_capture,
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capture_channel: input_capture,
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@ -86,7 +86,7 @@ impl Timestamper {
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// The capture channel should capture whenever the trigger input occurs.
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// The capture channel should capture whenever the trigger input occurs.
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let input_capture = capture_channel
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let input_capture = capture_channel
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.into_input_capture(timers::CaptureTrigger::TriggerInput);
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.into_input_capture(timers::tim8::CaptureSource1::TRC);
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input_capture.listen_dma();
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input_capture.listen_dma();
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// The data transfer is always a transfer of data from the peripheral to a RAM buffer.
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// The data transfer is always a transfer of data from the peripheral to a RAM buffer.
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@ -1,13 +1,14 @@
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///! The sampling timer is used for managing ADC sampling and external reference timestamping.
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///! The sampling timer is used for managing ADC sampling and external reference timestamping.
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use super::hal;
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use super::hal;
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/// The source of an input capture trigger.
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use hal::stm32::{
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#[allow(dead_code)]
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// TIM1 and TIM8 have identical registers.
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pub enum CaptureTrigger {
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tim1 as __tim8,
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Input13 = 0b01,
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tim2 as __tim2,
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Input24 = 0b10,
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// TIM2 and TIM5 have identical registers.
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TriggerInput = 0b11,
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tim2 as __tim5,
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}
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tim3 as __tim3,
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};
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/// The event that should generate an external trigger from the peripheral.
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/// The event that should generate an external trigger from the peripheral.
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#[allow(dead_code)]
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#[allow(dead_code)]
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@ -225,6 +226,8 @@ macro_rules! timer_channels {
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($index:expr, $TY:ty, $ccmrx:expr, $size:ty) => {
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($index:expr, $TY:ty, $ccmrx:expr, $size:ty) => {
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paste::paste! {
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paste::paste! {
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pub use super::[< __ $TY:lower >]::[< $ccmrx _input >]::[< CC $index S_A>] as [< CaptureSource $index >];
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/// A capture/compare channel of the timer.
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/// A capture/compare channel of the timer.
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pub struct [< Channel $index >] {}
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pub struct [< Channel $index >] {}
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@ -267,12 +270,10 @@ macro_rules! timer_channels {
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/// # Args
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/// # Args
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/// * `input` - The input source for the input capture event.
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/// * `input` - The input source for the input capture event.
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#[allow(dead_code)]
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#[allow(dead_code)]
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pub fn into_input_capture(self, input: super::CaptureTrigger) -> [< Channel $index InputCapture >]{
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pub fn into_input_capture(self, input: [< CaptureSource $index >]) -> [< Channel $index InputCapture >]{
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let regs = unsafe { &*<$TY>::ptr() };
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let regs = unsafe { &*<$TY>::ptr() };
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// Note(unsafe): The bit configuration is guaranteed to be valid by the
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regs.[< $ccmrx _input >]().modify(|_, w| w.[< cc $index s>]().variant(input));
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// CaptureTrigger enum definition.
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regs.[< $ccmrx _input >]().modify(|_, w| unsafe { w.[< cc $index s>]().bits(input as u8) });
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[< Channel $index InputCapture >] {}
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[< Channel $index InputCapture >] {}
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}
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}
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@ -316,6 +317,9 @@ macro_rules! timer_channels {
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/// Enable the input capture to begin capturing timer values.
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/// Enable the input capture to begin capturing timer values.
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#[allow(dead_code)]
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#[allow(dead_code)]
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pub fn enable(&mut self) {
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pub fn enable(&mut self) {
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// Read the latest input capture to clear any pending data in the register.
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let _ = self.latest_capture();
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// Note(unsafe): This channel owns all access to the specific timer channel.
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// Note(unsafe): This channel owns all access to the specific timer channel.
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// Only atomic operations on completed on the timer registers.
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// Only atomic operations on completed on the timer registers.
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let regs = unsafe { &*<$TY>::ptr() };
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let regs = unsafe { &*<$TY>::ptr() };
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