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Merge #34

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34: enable cycle counter r=jordens a=jordens

c.f. japaric/cortex-m-rtfm#184

close #31 

Signed-off-by: Robert Jördens <rj@quartiq.de>

Co-authored-by: Robert Jördens <rj@quartiq.de>
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bors[bot] 2019-09-11 13:36:53 +00:00 committed by GitHub
commit 43f58ebb62
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src/main.rs
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@ -555,7 +555,7 @@ const APP: () = {
cp.SCB.enable_icache();
// TODO: ETH DMA coherence issues
// cp.SCB.enable_dcache(&mut cp.CPUID);
// cp.DWT.enable_cycle_counter();
cp.DWT.enable_cycle_counter(); // japaric/cortex-m-rtfm#184
rcc.ahb4enr.modify(|_, w|
w.gpioaen().set_bit()