lowpass: reimplement better
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@ -1,35 +1,30 @@
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use super::{lowpass::Lowpass, Complex};
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use super::{lowpass::Lowpass, Complex};
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use generic_array::typenum::U3;
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use generic_array::typenum::U4;
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#[derive(Clone, Default)]
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#[derive(Clone, Default)]
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pub struct Lockin {
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pub struct Lockin {
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state: [Lowpass<U3>; 2],
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state: [Lowpass<U4>; 2],
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k: u8,
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}
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}
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impl Lockin {
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impl Lockin {
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/// Create a new Lockin with given IIR coefficients.
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/// Create a new Lockin with given IIR coefficients.
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pub fn new(k: u8) -> Self {
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pub fn new() -> Self {
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let lp = Lowpass::default();
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let lp = Lowpass::default();
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Self {
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Self {
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state: [lp.clone(), lp],
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state: [lp.clone(), lp],
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k,
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}
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}
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}
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}
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/// Update the lockin with a sample taken at a given phase.
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/// Update the lockin with a sample taken at a given phase.
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pub fn update(&mut self, sample: i32, phase: i32) -> Complex<i32> {
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pub fn update(&mut self, sample: i16, phase: i32, k: u8) -> Complex<i32> {
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// Get the LO signal for demodulation.
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// Get the LO signal for demodulation.
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let lo = Complex::from_angle(phase);
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let lo = Complex::from_angle(phase);
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// Mix with the LO signal, filter with the IIR lowpass,
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// Mix with the LO signal, filter with the IIR lowpass,
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// return IQ (in-phase and quadrature) data.
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// return IQ (in-phase and quadrature) data.
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// Note: 32x32 -> 64 bit multiplications are pretty much free.
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Complex(
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Complex(
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self.state[0]
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self.state[0].update((sample as i32 * (lo.0 >> 16)) >> 16, k),
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.update(((sample as i64 * lo.0 as i64) >> 32) as _, self.k),
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self.state[1].update((sample as i32 * (lo.1 >> 16)) >> 16, k),
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self.state[1]
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.update(((sample as i64 * lo.1 as i64) >> 32) as _, self.k),
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)
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)
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}
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}
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}
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}
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@ -1,38 +1,35 @@
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use generic_array::{ArrayLength, GenericArray};
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use generic_array::{ArrayLength, GenericArray};
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/// Arbitrary order, high dynamic range, wide coefficient range,
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/// Arbitrary order, high dynamic range, wide coefficient range,
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/// lowpass filter implementation.
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/// lowpass filter implementation. DC gain is 1.
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///
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///
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/// Type argument N is the filter order + 1.
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/// Type argument N is the filter order.
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#[derive(Clone, Default)]
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#[derive(Clone, Default)]
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pub struct Lowpass<N: ArrayLength<i32>> {
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pub struct Lowpass<N: ArrayLength<i32>> {
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// IIR state storage
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// IIR state storage
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xy: GenericArray<i32, N>,
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y: GenericArray<i32, N>,
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}
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}
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impl<N: ArrayLength<i32>> Lowpass<N> {
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impl<N: ArrayLength<i32>> Lowpass<N> {
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/// Update the filter with a new sample.
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/// Update the filter with a new sample.
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///
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///
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/// # Args
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/// # Args
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/// * `x`: Input data
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/// * `x`: Input data, needs k bits headroom
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/// * `k`: Log2 time constant, 1..32
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/// * `k`: Log2 time constant, 0..31
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///
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///
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/// # Return
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/// # Return
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/// Filtered output y
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/// Filtered output y
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pub fn update(&mut self, x: i32, k: u8) -> i32 {
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pub fn update(&mut self, x: i32, k: u8) -> i32 {
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debug_assert!((1..32).contains(&k));
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debug_assert!(k & 31 == k);
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// This is an unrolled and optimized first-order IIR loop
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// This is an unrolled and optimized first-order IIR loop
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// that works for all possible time constants.
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// that works for all possible time constants.
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// Note the zero(s) at Nyquist.
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// Note DF-II and the zero(s) at Nyquist.
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let mut x0 = x;
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let mut x = x;
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let mut x1 = self.xy[0];
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for y in self.y.iter_mut() {
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self.xy[0] = x0;
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let dy = x - (*y >> k);
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for y1 in self.xy[1..].iter_mut() {
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*y += dy;
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x0 = *y1
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x = (*y - (dy >> 1)) >> k;
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+ (((x0 >> 2) + (x1 >> 2) - (*y1 >> 1) + (1 << (k - 1))) >> k);
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x1 = *y1;
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*y1 = x0;
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}
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}
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x0
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x
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}
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}
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}
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}
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@ -34,7 +34,7 @@ const APP: () = {
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+ design_parameters::SAMPLE_BUFFER_SIZE_LOG2,
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+ design_parameters::SAMPLE_BUFFER_SIZE_LOG2,
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);
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);
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let lockin = Lockin::new(10);
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let lockin = Lockin::new();
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// Enable ADC/DAC events
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// Enable ADC/DAC events
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stabilizer.adcs.0.start();
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stabilizer.adcs.0.start();
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@ -102,6 +102,9 @@ const APP: () = {
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// Demodulation LO phase offset
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// Demodulation LO phase offset
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let phase_offset: i32 = 0; // TODO: expose
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let phase_offset: i32 = 0; // TODO: expose
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// Log2 lowpass time constant
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let time_constant: u8 = 8; // TODO: expose
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let sample_frequency = ((pll_frequency
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let sample_frequency = ((pll_frequency
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// .wrapping_add(1 << design_parameters::SAMPLE_BUFFER_SIZE_LOG2 - 1) // half-up rounding bias
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// .wrapping_add(1 << design_parameters::SAMPLE_BUFFER_SIZE_LOG2 - 1) // half-up rounding bias
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>> design_parameters::SAMPLE_BUFFER_SIZE_LOG2)
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>> design_parameters::SAMPLE_BUFFER_SIZE_LOG2)
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@ -115,7 +118,7 @@ const APP: () = {
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.zip(Accu::new(sample_phase, sample_frequency))
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.zip(Accu::new(sample_phase, sample_frequency))
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// Convert to signed, MSB align the ADC sample.
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// Convert to signed, MSB align the ADC sample.
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.map(|(&sample, phase)| {
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.map(|(&sample, phase)| {
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lockin.update((sample as i16 as i32) << 16, phase)
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lockin.update(sample as i16, phase, time_constant)
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})
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})
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.last()
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.last()
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.unwrap();
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.unwrap();
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@ -125,7 +128,7 @@ const APP: () = {
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// Convert from IQ to power and phase.
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// Convert from IQ to power and phase.
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"power_phase" => [output.abs_sqr(), output.arg()],
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"power_phase" => [output.abs_sqr(), output.arg()],
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"frequency_discriminator" => [pll_frequency as i32, output.arg()],
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"frequency_discriminator" => [pll_frequency as i32, output.arg()],
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_ => [output.0, output.1],
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_ => [output.0 << 16, output.1 << 16],
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};
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};
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// Convert to DAC data.
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// Convert to DAC data.
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@ -28,7 +28,7 @@ const APP: () = {
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// Configure the microcontroller
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// Configure the microcontroller
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let (mut stabilizer, _pounder) = hardware::setup(c.core, c.device);
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let (mut stabilizer, _pounder) = hardware::setup(c.core, c.device);
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let lockin = Lockin::new(10); // TODO: expose
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let lockin = Lockin::new();
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// Enable ADC/DAC events
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// Enable ADC/DAC events
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stabilizer.adcs.1.start();
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stabilizer.adcs.1.start();
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@ -85,10 +85,14 @@ const APP: () = {
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1i32 << (32 - design_parameters::SAMPLE_BUFFER_SIZE_LOG2);
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1i32 << (32 - design_parameters::SAMPLE_BUFFER_SIZE_LOG2);
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// Harmonic index of the LO: -1 to _de_modulate the fundamental
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// Harmonic index of the LO: -1 to _de_modulate the fundamental
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let harmonic: i32 = -1;
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let harmonic: i32 = -1; // TODO: expose
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// Demodulation LO phase offset
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// Demodulation LO phase offset
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let phase_offset: i32 = (0.25 * i32::MAX as f32) as i32;
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let phase_offset: i32 = (0.25 * i32::MAX as f32) as i32; // TODO: expose
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// Log2 lowpass time constant.
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let time_constant: u8 = 8;
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let sample_frequency = (pll_frequency as i32).wrapping_mul(harmonic);
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let sample_frequency = (pll_frequency as i32).wrapping_mul(harmonic);
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let sample_phase = phase_offset
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let sample_phase = phase_offset
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.wrapping_add((pll_phase as i32).wrapping_mul(harmonic));
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.wrapping_add((pll_phase as i32).wrapping_mul(harmonic));
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@ -99,24 +103,14 @@ const APP: () = {
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.zip(Accu::new(sample_phase, sample_frequency))
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.zip(Accu::new(sample_phase, sample_frequency))
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// Convert to signed, MSB align the ADC sample, update the Lockin (demodulate, filter)
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// Convert to signed, MSB align the ADC sample, update the Lockin (demodulate, filter)
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.map(|(&sample, phase)| {
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.map(|(&sample, phase)| {
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lockin.update((sample as i16 as i32) << 16, phase)
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lockin.update(sample as i16, phase, time_constant)
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})
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})
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// Decimate
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// Decimate
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.last()
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.last()
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.unwrap();
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.unwrap();
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// convert i/q to power/phase,
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let power_phase = true; // TODO: expose
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let output = if power_phase {
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// Convert from IQ to power and phase.
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[output.abs_sqr(), output.arg()]
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} else {
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[output.0, output.1]
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};
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for value in dac_samples[1].iter_mut() {
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for value in dac_samples[1].iter_mut() {
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*value = (output[1] >> 16) as u16 ^ 0x8000;
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*value = (output.arg() >> 16) as u16 ^ 0x8000;
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}
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}
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}
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}
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