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Adding simplified clocking semantics

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This commit is contained in:
Ryan Summers 2021-02-17 12:08:03 +01:00
parent 9e1f4a864c
commit 13e02710cd
5 changed files with 87 additions and 70 deletions
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52
src/bin/dual-iir.rs
View File

@ -4,20 +4,18 @@
use stm32h7xx_hal as hal;
use rtic::cyccnt::{Instant, U32Ext};
use stabilizer::hardware;
use miniconf::{
embedded_nal::{IpAddr, Ipv4Addr},
minimq,
MqttInterface, StringSet,
minimq, MqttInterface, StringSet,
};
use serde::Deserialize;
use dsp::iir;
use hardware::{
Adc0Input, Adc1Input, Dac0Output, Dac1Output, NetworkStack, AFE0, AFE1,
Adc0Input, Adc1Input, CycleCounter, Dac0Output, Dac1Output, NetworkStack,
AFE0, AFE1,
};
const SCALE: f32 = i16::MAX as _;
@ -32,9 +30,7 @@ pub struct Settings {
impl Settings {
pub fn new() -> Self {
Self {
test: 0,
}
Self { test: 0 }
}
}
@ -44,7 +40,9 @@ const APP: () = {
afes: (AFE0, AFE1),
adcs: (Adc0Input, Adc1Input),
dacs: (Dac0Output, Dac1Output),
mqtt_interface: MqttInterface<Settings, NetworkStack, minimq::consts::U256>,
mqtt_interface:
MqttInterface<Settings, NetworkStack, minimq::consts::U256>,
clock: CycleCounter,
// Format: iir_state[ch][cascade-no][coeff]
#[init([[iir::Vec5([0.; 5]); IIR_CASCADE_LENGTH]; 2])]
@ -61,14 +59,15 @@ const APP: () = {
let mqtt_interface = {
let mqtt_client = {
let broker = IpAddr::V4(Ipv4Addr::new(10, 34, 16, 1));
minimq::MqttClient::new(broker, "stabilizer", stabilizer.net.stack).unwrap()
minimq::MqttClient::new(
broker,
"stabilizer",
stabilizer.net.stack,
)
.unwrap()
};
MqttInterface::new(
mqtt_client,
"stabilizer",
Settings::new(),
)
MqttInterface::new(mqtt_client, "stabilizer", Settings::new())
.unwrap()
};
@ -86,6 +85,7 @@ const APP: () = {
afes: stabilizer.afes,
adcs: stabilizer.adcs,
dacs: stabilizer.dacs,
clock: stabilizer.cycle_counter,
}
}
@ -134,26 +134,14 @@ const APP: () = {
}
}
#[idle(resources=[mqtt_interface], spawn=[settings_update])]
#[idle(resources=[mqtt_interface, clock], spawn=[settings_update])]
fn idle(mut c: idle::Context) -> ! {
let mut time = 0u32;
let mut next_ms = Instant::now();
// TODO: Replace with reference to CPU clock from CCDR.
next_ms += 400_000.cycles();
let clock = c.resources.clock;
loop {
let tick = Instant::now() > next_ms;
if tick {
next_ms += 400_000.cycles();
time += 1;
}
let sleep = c
.resources
.mqtt_interface
.lock(|interface| !interface.network_stack().poll(time));
let sleep = c.resources.mqtt_interface.lock(|interface| {
!interface.network_stack().poll(clock.current_ms())
});
match c
.resources

53
src/bin/lockin-external.rs
View File

@ -4,12 +4,9 @@
use stm32h7xx_hal as hal;
use rtic::cyccnt::{Instant, U32Ext};
use miniconf::{
embedded_nal::{IpAddr, Ipv4Addr},
minimq,
MqttInterface, StringSet,
minimq, MqttInterface, StringSet,
};
use serde::Deserialize;
@ -23,12 +20,12 @@ use hardware::{
#[derive(Deserialize, StringSet)]
pub struct Settings {
data: u32,
}
impl Settings {
pub fn new() -> Self {
Self {
}
Self { data: 5 }
}
}
@ -38,7 +35,12 @@ const APP: () = {
afes: (AFE0, AFE1),
adcs: (Adc0Input, Adc1Input),
dacs: (Dac0Output, Dac1Output),
mqtt_interface: MqttInterface<Settings, hardware::NetworkStack, minimq::consts::U256>,
clock: hardware::CycleCounter,
mqtt_interface: MqttInterface<
Settings,
hardware::NetworkStack,
minimq::consts::U256,
>,
timestamper: InputStamper,
pll: RPLL,
@ -53,14 +55,15 @@ const APP: () = {
let mqtt_interface = {
let mqtt_client = {
let broker = IpAddr::V4(Ipv4Addr::new(10, 34, 16, 1));
minimq::MqttClient::new(broker, "stabilizer", stabilizer.net.stack).unwrap()
minimq::MqttClient::new(
broker,
"stabilizer",
stabilizer.net.stack,
)
.unwrap()
};
MqttInterface::new(
mqtt_client,
"stabilizer",
Settings::new(),
)
MqttInterface::new(mqtt_client, "stabilizer", Settings::new())
.unwrap()
};
@ -90,6 +93,7 @@ const APP: () = {
adcs: stabilizer.adcs,
dacs: stabilizer.dacs,
timestamper: stabilizer.timestamper,
clock: stabilizer.cycle_counter,
pll,
lockin: Lockin::default(),
@ -172,26 +176,13 @@ const APP: () = {
}
}
#[idle(resources=[mqtt_interface], spawn=[settings_update])]
#[idle(resources=[mqtt_interface, clock], spawn=[settings_update])]
fn idle(mut c: idle::Context) -> ! {
let mut time = 0u32;
let mut next_ms = Instant::now();
// TODO: Replace with reference to CPU clock from CCDR.
next_ms += 400_000.cycles();
let clock = c.resources.clock;
loop {
let tick = Instant::now() > next_ms;
if tick {
next_ms += 400_000.cycles();
time += 1;
}
let sleep = c
.resources
.mqtt_interface
.lock(|interface| !interface.network_stack().poll(time));
let sleep = c.resources.mqtt_interface.lock(|interface| {
!interface.network_stack().poll(clock.current_ms())
});
match c
.resources

10
src/hardware/configuration.rs
View File

@ -12,8 +12,9 @@ use smoltcp_nal::smoltcp;
use embedded_hal::digital::v2::{InputPin, OutputPin};
use super::{
adc, afe, dac, design_parameters, digital_input_stamper, eeprom, pounder,
timers, DdsOutput, NetworkStack, AFE0, AFE1,
adc, afe, cycle_counter::CycleCounter, dac, design_parameters,
digital_input_stamper, eeprom, pounder, timers, DdsOutput, NetworkStack,
AFE0, AFE1,
};
pub struct NetStorage {
@ -42,6 +43,7 @@ pub struct StabilizerDevices {
pub adc_dac_timer: timers::SamplingTimer,
pub timestamp_timer: timers::TimestampTimer,
pub net: NetworkDevices,
pub cycle_counter: CycleCounter,
}
/// The available Pounder-specific hardware interfaces.
@ -831,6 +833,7 @@ pub fn setup(
net: network_devices,
adc_dac_timer: sampling_timer,
timestamp_timer,
cycle_counter: CycleCounter::new(core.DWT, ccdr.clocks.c_ck()),
};
// info!("Version {} {}", build_info::PKG_VERSION, build_info::GIT_VERSION.unwrap());
@ -840,8 +843,5 @@ pub fn setup(
// Enable the instruction cache.
core.SCB.enable_icache();
// Utilize the cycle counter for RTIC scheduling.
core.DWT.enable_cycle_counter();
(stabilizer, pounder)
}

36
src/hardware/cycle_counter.rs Normal file
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@ -0,0 +1,36 @@
use rtic::cyccnt::{Duration, Instant, U32Ext};
use stm32h7xx_hal::time::Hertz;
pub struct CycleCounter {
next_tick: Instant,
ticks: u32,
increment: Duration,
}
impl CycleCounter {
pub fn new(
mut dwt: cortex_m::peripheral::DWT,
cpu_frequency: impl Into<Hertz>,
) -> Self {
dwt.enable_cycle_counter();
let increment =
((cpu_frequency.into().0 as f32 / 1000.0) as u32).cycles();
Self {
increment,
ticks: 0,
next_tick: Instant::now() + increment,
}
}
pub fn current_ms(&mut self) -> u32 {
let now = Instant::now();
while now > self.next_tick {
self.next_tick += self.increment;
self.ticks += 1;
}
self.ticks
}
}

2
src/hardware/mod.rs
View File

@ -10,6 +10,7 @@ use panic_halt as _;
mod adc;
mod afe;
mod configuration;
mod cycle_counter;
mod dac;
pub mod design_parameters;
mod digital_input_stamper;
@ -19,6 +20,7 @@ mod timers;
pub use adc::{Adc0Input, Adc1Input};
pub use afe::Gain as AfeGain;
pub use cycle_counter::CycleCounter;
pub use dac::{Dac0Output, Dac1Output};
pub use digital_input_stamper::InputStamper;
pub use pounder::DdsOutput;