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517 Commits

Author SHA1 Message Date
pca006132 671968bac3 libboard_zynq/eth: fixed tx lost packet 2020-08-24 15:51:01 +08:00
pca006132 39f672dde8 libasync/smoltcp/mod: prevent duplicated wakers 2020-08-24 15:25:03 +08:00
pca006132 c13ca614ef libcortex_a9/mutex: use AcqRel for CAS operations 2020-08-24 15:24:20 +08:00
pca006132 bb09d25378 libboard_zynq/ethernet: ethernet fix and config 2020-08-21 13:34:02 +08:00
pca006132 a1f859637a experiments: enabled L2 cache
...and removed some trailing spaces
2020-08-20 13:02:28 +08:00
pca006132 7cb2669c3b Updated cargo dependencies 2020-08-20 13:01:49 +08:00
pca006132 511c906d4d libcortex_a9/uncached: fixed mmu setting 2020-08-20 13:01:49 +08:00
pca006132 1ba0aa450f libsupport_zynq/boot: fix cache mainteinance opertaions 2020-08-20 13:01:49 +08:00
pca006132 283bc9b810 libcortex_a9: added L2 cache 2020-08-20 13:01:17 +08:00
Astro b268fe015a stdio::drop_uart(): add delay 2020-08-17 19:38:41 +02:00
Astro 64db9b0142 Merge pull request 'libboard_zynq: dead code, peripheral & regblock ctor names consistency' (#63) from harry/zynq-rs:cleanup into master 2020-08-17 23:38:22 +08:00
Astro 4b258c19f5 libasync: improve scheduling fairness between block_on and spawned tasks
in the libasync::smoltcp::Sockets::run() case the block_on iface.poll
loop would progress just one task before. now all tasks get to run in
each iteration.
2020-08-17 00:58:12 +02:00
Harry Ho 1a96a7550a libboard_zynq: make RegisterBlock constructors more consistent 2020-08-13 14:49:26 +08:00
Harry Ho 36947104e3 libboard_zynq: make constructor names more consistent 2020-08-13 13:31:53 +08:00
Harry Ho 11089d8a64 i2c: delete dead code 2020-08-12 16:51:25 +08:00
harry c69cd9951e Update README and build.sh (#59)
update build.sh to use rpi-4 directly; fix README

README: update build instruction

build.sh: fix missing package argument

Co-authored-by: Harry Ho <hh@m-labs.hk>
2020-08-11 11:24:21 +08:00
Harry Ho 76a4cac873 i2c: disable its usage on Cora Z7-10 2020-08-10 14:24:13 +08:00
Harry Ho 4614ed1371 i2c: simplify ctor_common() 2020-08-08 10:06:11 +08:00
pca006132 fa07bdb681 libcortex_a9/mmu: share ocm3.
This fixes issue #54.
2020-08-07 15:10:38 +08:00
Harry Ho 4565a75766 experiments: add I2C bitbang EEPROM writing/reading example 2020-08-07 11:10:20 +08:00
Harry Ho 16b2df91ca i2c: fix GPIO register mapping, I2C control & EEPROM write operations 2020-08-07 11:10:18 +08:00
Harry Ho f7d3135ec7 i2c: implement EEPROM operations; add CountDown waiting indication 2020-08-05 20:10:30 +08:00
Harry Ho c60230af25 i2c: implement basic i2c bitbanging 2020-08-05 17:35:33 +08:00
pca006132 e8ba73a8c7 Updated build instruction. 2020-08-05 17:08:24 +08:00
pca006132 3958953ceb libcortex_a9/sync_channel: added drop_elements function. 2020-08-05 15:29:28 +08:00
Sebastien Bourdeauducq a36a82d86d reduce ethernet verbosity 2020-08-04 22:15:01 +08:00
pca006132 25c6d5eeaa Changes usage of sev/wfe to spinlock functions. 2020-08-04 13:54:19 +08:00
pca006132 9e97102e12 libcortex_a9: implemented semaphore. 2020-08-04 13:34:08 +08:00
pca006132 b65606f2d0 libcortex_a9/sync_channel: added reset. 2020-08-03 15:50:31 +08:00
pca006132 ee4089c52e updated cargoSha256 2020-08-03 14:59:49 +08:00
pca006132 36c3fbdacd experiments: fixed linker script. 2020-08-03 14:48:44 +08:00
pca006132 8328ffc66b libsupport_zynq/ram: allow single allocator. 2020-08-03 14:48:44 +08:00
pca006132 84041a3154 libsupport_zynq/ram: use core0 allocator by default. 2020-08-03 14:48:44 +08:00
pca006132 5850401d72 libsupport_zynq/ram: split allocators for two cores. 2020-08-03 14:48:44 +08:00
pca006132 ccce37dffd linked_list_allocator: upgraded to 0.8.4
So we get the `used` function to check heap usage.
2020-08-03 14:48:17 +08:00
pca006132 3bbd1513fb build.sh: specify build experiments
Otherwise we cannot turn off the default feature for libsupport_zynq.
https://github.com/rust-lang/cargo/issues/8366#issuecomment-644995218
2020-08-03 14:09:36 +08:00
pca006132 7d38c53c18 libsupport_zynq/abort: moved core1 restart code to user code. 2020-08-03 14:09:36 +08:00
pca006132 02a2c4d1e3 experiments: updated example. 2020-08-03 12:35:17 +08:00
pca006132 12669124a4 libcortex_a9/mutex: added interrupt critical section mask. 2020-08-03 12:35:17 +08:00
pca006132 8f0a6bd5ea libsupport_zynq/abort: restart core1 main on core1 IRQ#0. 2020-08-03 12:35:17 +08:00
pca006132 c1f61b5673 libcortex_a9/boot: enable IRQ on reset. 2020-08-03 12:35:17 +08:00
pca006132 2927c43309 libboard_zynq/gic: refactored and added SGI functions. 2020-08-03 12:35:17 +08:00
Astro 187801c4a7 gic: start implementation 2020-08-03 12:35:17 +08:00
pca006132 91ece367f2 libboard_zynq/mpcore: added generated register definitions 2020-08-03 12:35:17 +08:00
Astro 1f05e6977e eth::phy: replace ExtendedStatus with PSSR 2020-07-29 21:49:18 +02:00
Astro e408a8b22d eth::phy::extended_status: fix cap_1000base_x_full() bit position 2020-07-29 21:29:28 +02:00
Astro 27effb6257 eth::phy: s/Marvel/Marvell/ 2020-07-29 20:08:38 +02:00
Astro de5f605d60 eth: refactor peripheral instance into type parameter, improve clock setup 2020-07-29 19:45:01 +02:00
pca006132 ad47521e4b libsupport_zynq/boot: fixed core1 disable. 2020-07-28 12:36:23 +08:00
pca006132 c50e72f91e experiments: use OCM instead of OCM3 (#54) 2020-07-28 12:36:23 +08:00