Björn Stein
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1804c4c6e8
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cortex_a9: add proper L1 cache invalidation
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2019-10-18 00:11:51 +02:00 |
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1f9ad5ff62
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delint
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2019-08-11 00:56:54 +02:00 |
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1634513bc7
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mmu: align l1_table
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2019-06-18 19:18:47 +02:00 |
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9bebfb49bc
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begin MMU implementation
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2019-06-17 03:32:10 +02:00 |
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69b65b5f72
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cortex_a9 regs: allow defining bit fields
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2019-06-17 01:36:11 +02:00 |
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1e16beb707
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cortex_a9::regs: use crate::regs interface
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2019-06-12 00:20:23 +02:00 |
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6d15b82a3e
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cortex_a9::regs: init U bit for unaligned access
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2019-06-04 23:47:23 +02:00 |
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2df74cc055
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add static exception handling
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2019-05-30 20:30:19 +02:00 |
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75bb755327
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extend linker script
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2019-05-27 22:38:10 +02:00 |
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1033648c3e
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add l1_cache_init()
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2019-05-23 19:05:06 +02:00 |
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9b414e2408
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PoC: boot, uart output in qemu
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2019-05-05 14:56:23 +02:00 |
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