forked from M-Labs/zynq-rs
libboard_zynq: improve i2c doc
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@ -40,53 +40,66 @@ impl RegisterBlock {
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}
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}
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// MASK_DATA_1_MSW:
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// Maskable output data for MIO[53:48]
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register!(gpio_output_mask, GPIOOutputMask, RW, u32);
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register!(gpio_output_mask,
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/// MASK_DATA_1_MSW:
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/// Maskable output data for MIO[53:48]
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GPIOOutputMask, RW, u32);
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#[cfg(any(feature = "target_zc706", feature = "target_kasli_soc"))]
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register_at!(GPIOOutputMask, 0xE000A00C, new);
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#[cfg(any(feature = "target_zc706", feature = "target_kasli_soc"))]
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// Output for SCL
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register_bit!(gpio_output_mask, scl_o, 2);
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// Output for SDA
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register_bit!(gpio_output_mask,
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/// Output for SCL
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scl_o, 2);
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#[cfg(any(feature = "target_zc706", feature = "target_kasli_soc"))]
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register_bit!(gpio_output_mask, sda_o, 3);
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// Mask for keeping bits except SCL and SDA unchanged
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register_bit!(gpio_output_mask,
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/// Output for SDA
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sda_o, 3);
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#[cfg(any(feature = "target_zc706", feature = "target_kasli_soc"))]
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register_bits!(gpio_output_mask, mask, u16, 16, 31);
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register_bits!(gpio_output_mask,
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/// Mask for keeping bits except SCL and SDA unchanged
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mask, u16, 16, 31);
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// DATA_1_RO:
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// Input data for MIO[53:32]
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register!(gpio_input, GPIOInput, RO, u32);
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register!(gpio_input,
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/// DATA_1_RO:
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/// Input data for MIO[53:32]
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GPIOInput, RO, u32);
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#[cfg(any(feature = "target_zc706", feature = "target_kasli_soc"))]
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register_at!(GPIOInput, 0xE000A064, new);
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// Input for SCL
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#[cfg(any(feature = "target_zc706", feature = "target_kasli_soc"))]
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register_bit!(gpio_input, scl, 18);
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// Input for SDA
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register_bit!(gpio_input,
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/// Input for SCL
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scl, 18);
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#[cfg(any(feature = "target_zc706", feature = "target_kasli_soc"))]
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register_bit!(gpio_input, sda, 19);
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register_bit!(gpio_input,
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/// Input for SDA
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sda, 19);
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// DIRM_1:
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// Direction mode for MIO[53:32]; 0/1 = in/out
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register!(gpio_direction, GPIODirection, RW, u32);
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register!(gpio_direction,
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/// DIRM_1:
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/// Direction mode for MIO[53:32]; 0/1 = in/out
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GPIODirection, RW, u32);
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#[cfg(any(feature = "target_zc706", feature = "target_kasli_soc"))]
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register_at!(GPIODirection, 0xE000A244, new);
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// Direction for SCL
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#[cfg(any(feature = "target_zc706", feature = "target_kasli_soc"))]
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register_bit!(gpio_direction, scl, 18);
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// Direction for SDA
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register_bit!(gpio_direction,
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/// Direction for SCL
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scl, 18);
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#[cfg(any(feature = "target_zc706", feature = "target_kasli_soc"))]
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register_bit!(gpio_direction, sda, 19);
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register_bit!(gpio_direction,
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/// Direction for SDA
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sda, 19);
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// OEN_1:
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// Output enable for MIO[53:32]
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register!(gpio_output_enable, GPIOOutputEnable, RW, u32);
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register!(gpio_output_enable,
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/// OEN_1:
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/// Output enable for MIO[53:32]
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GPIOOutputEnable, RW, u32);
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#[cfg(any(feature = "target_zc706", feature = "target_kasli_soc"))]
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register_at!(GPIOOutputEnable, 0xE000A248, new);
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// Output enable for SCL
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#[cfg(any(feature = "target_zc706", feature = "target_kasli_soc"))]
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register_bit!(gpio_output_enable, scl, 18);
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// Output enable for SDA
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register_bit!(gpio_output_enable,
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/// Output enable for SCL
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scl, 18);
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#[cfg(any(feature = "target_zc706", feature = "target_kasli_soc"))]
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register_bit!(gpio_output_enable, sda, 19);
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register_bit!(gpio_output_enable,
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/// Output enable for SDA
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sda, 19);
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