Harry Ho 64e85fc143 [WIP] Simplify ARTIQ scripts for DAC & TTL sync tests ... * A single `SyncDDSTTL` experiment definition can be used to test DAC and TTL outputs. * For ST1/ST3, simply run this on Sayma gateware that produces hardcoded waves at SAWGs. * For ST2/ST4, either: * simply run this on Sayma gateware that produces hardcoded waves at both SAWGs and TTLs; or * set `gen_ttl_wave=true` and run this on Sayma gateware that produces hardcoded waves at SAWGs only, while both MCXs are used as TTLOuts.		2021-04-12 16:15:04 +08:00
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device_db.py	[WIP] Simplify ARTIQ scripts for DAC & TTL sync tests	2021-04-12 16:15:04 +08:00
syncddsttl.py	[WIP] Simplify ARTIQ scripts for DAC & TTL sync tests	2021-04-12 16:15:04 +08:00