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tec: enable GPIO pins for TEC SHDN

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This commit is contained in:
Astro 2019-11-10 22:27:20 +01:00
parent aafb733209
commit 7efd42715e
2 changed files with 17 additions and 0 deletions
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4
firmware/src/board/gpio.rs
View File

@ -72,3 +72,7 @@ pub struct PE4;
def_gpio!(GPIO_PORTE_AHB, PE4, 4); def_gpio!(GPIO_PORTE_AHB, PE4, 4);
pub struct PE5; pub struct PE5;
def_gpio!(GPIO_PORTE_AHB, PE5, 5); def_gpio!(GPIO_PORTE_AHB, PE5, 5);
pub struct PP4;
def_gpio!(GPIO_PORTP, PP4, 4);
pub struct PP5;
def_gpio!(GPIO_PORTP, PP5, 5);

13
firmware/src/tec.rs
View File

@ -1,5 +1,7 @@
use core::fmt; use core::fmt;
use crate::board::pwm::{self, PwmChannel, PwmPeripheral}; use crate::board::pwm::{self, PwmChannel, PwmPeripheral};
use crate::board::gpio::{Gpio, GpioOutput, PP4, PP5};
use embedded_hal::digital::v2::OutputPin;
#[derive(Clone, Copy, Debug)] #[derive(Clone, Copy, Debug)]
pub enum TecPin { pub enum TecPin {
@ -33,6 +35,15 @@ impl fmt::Display for TecPin {
} }
} }
fn enable_shdn<G>(gpio: G)
where
G: Gpio,
GpioOutput<G>: OutputPin,
{
let mut pin = gpio.into_output();
let _ = pin.set_high();
}
/// Thermo-Electric Cooling device controlled through four PWM /// Thermo-Electric Cooling device controlled through four PWM
/// channels /// channels
pub struct Tec<MaxIPos: PwmChannel, MaxINeg: PwmChannel, ISet: PwmChannel, MaxV: PwmChannel> { pub struct Tec<MaxIPos: PwmChannel, MaxINeg: PwmChannel, ISet: PwmChannel, MaxV: PwmChannel> {
@ -46,6 +57,7 @@ impl Tec<pwm::T2CCP0, pwm::T2CCP1, pwm::T3CCP0, pwm::T3CCP1> {
pub fn tec0() -> Self { pub fn tec0() -> Self {
let (max_i_pos, max_i_neg) = tm4c129x::TIMER2::split(); let (max_i_pos, max_i_neg) = tm4c129x::TIMER2::split();
let (i_set, max_v) = tm4c129x::TIMER3::split(); let (i_set, max_v) = tm4c129x::TIMER3::split();
enable_shdn(PP4);
Tec { max_i_pos, max_i_neg, i_set, max_v } Tec { max_i_pos, max_i_neg, i_set, max_v }
} }
} }
@ -54,6 +66,7 @@ impl Tec<pwm::T4CCP0, pwm::T4CCP1, pwm::T5CCP0, pwm::T5CCP1> {
pub fn tec1() -> Self { pub fn tec1() -> Self {
let (max_i_pos, max_i_neg) = tm4c129x::TIMER4::split(); let (max_i_pos, max_i_neg) = tm4c129x::TIMER4::split();
let (i_set, max_v) = tm4c129x::TIMER5::split(); let (i_set, max_v) = tm4c129x::TIMER5::split();
enable_shdn(PP5);
Tec { max_i_pos, max_i_neg, i_set, max_v } Tec { max_i_pos, max_i_neg, i_set, max_v }
} }
} }