From 7efd42715ea1d3b142c7f0ebf2f74281611a214a Mon Sep 17 00:00:00 2001 From: Astro Date: Sun, 10 Nov 2019 22:27:20 +0100 Subject: [PATCH] tec: enable GPIO pins for TEC SHDN --- firmware/src/board/gpio.rs | 4 ++++ firmware/src/tec.rs | 13 +++++++++++++ 2 files changed, 17 insertions(+) diff --git a/firmware/src/board/gpio.rs b/firmware/src/board/gpio.rs index 974911b..9728915 100644 --- a/firmware/src/board/gpio.rs +++ b/firmware/src/board/gpio.rs @@ -72,3 +72,7 @@ pub struct PE4; def_gpio!(GPIO_PORTE_AHB, PE4, 4); pub struct PE5; def_gpio!(GPIO_PORTE_AHB, PE5, 5); +pub struct PP4; +def_gpio!(GPIO_PORTP, PP4, 4); +pub struct PP5; +def_gpio!(GPIO_PORTP, PP5, 5); diff --git a/firmware/src/tec.rs b/firmware/src/tec.rs index 85813c7..1d58103 100644 --- a/firmware/src/tec.rs +++ b/firmware/src/tec.rs @@ -1,5 +1,7 @@ use core::fmt; use crate::board::pwm::{self, PwmChannel, PwmPeripheral}; +use crate::board::gpio::{Gpio, GpioOutput, PP4, PP5}; +use embedded_hal::digital::v2::OutputPin; #[derive(Clone, Copy, Debug)] pub enum TecPin { @@ -33,6 +35,15 @@ impl fmt::Display for TecPin { } } +fn enable_shdn(gpio: G) +where + G: Gpio, + GpioOutput: OutputPin, +{ + let mut pin = gpio.into_output(); + let _ = pin.set_high(); +} + /// Thermo-Electric Cooling device controlled through four PWM /// channels pub struct Tec { @@ -46,6 +57,7 @@ impl Tec { pub fn tec0() -> Self { let (max_i_pos, max_i_neg) = tm4c129x::TIMER2::split(); let (i_set, max_v) = tm4c129x::TIMER3::split(); + enable_shdn(PP4); Tec { max_i_pos, max_i_neg, i_set, max_v } } } @@ -54,6 +66,7 @@ impl Tec { pub fn tec1() -> Self { let (max_i_pos, max_i_neg) = tm4c129x::TIMER4::split(); let (i_set, max_v) = tm4c129x::TIMER5::split(); + enable_shdn(PP5); Tec { max_i_pos, max_i_neg, i_set, max_v } } }