harry
/
zynq-rs
forked from M-Labs/zynq-rs
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity
183 Commits 14 Branches 0 Tags 1.3 MiB
Commit Graph

17 Commits

Author SHA1 Message Date
Astro ff41f4dd2d cortex_a9::mutex: restore and fix powersaving behaviour, doc 2019-11-20 16:30:56 +01:00
Astro d89f594ba4 cortex_a9::mutex: use AtomU32, remove powersaving behavior 
Mutex works properly now.
 2019-11-18 02:37:59 +01:00
Astro 4e4ff512d9 add cortex_a9::mutex 2019-11-18 02:13:54 +01:00
Astro 85f29ace6b boot: flush cache-line 2019-11-18 01:22:57 +01:00
Astro b6596d930d boot: ACTLR.enable_smp() 2019-11-16 00:12:58 +01:00
Astro 49901d1b8a boot: prepare core1 bootup 2019-11-15 23:59:01 +01:00
Björn Stein 1804c4c6e8 cortex_a9: add proper L1 cache invalidation 2019-10-18 00:11:51 +02:00
Astro 1f9ad5ff62 delint 2019-08-11 00:56:54 +02:00
Astro 1634513bc7 mmu: align l1_table 2019-06-18 19:18:47 +02:00
Astro 9bebfb49bc begin MMU implementation 2019-06-17 03:32:10 +02:00
Astro 69b65b5f72 cortex_a9 regs: allow defining bit fields 2019-06-17 01:36:11 +02:00
Astro 1e16beb707 cortex_a9::regs: use crate::regs interface 2019-06-12 00:20:23 +02:00
Astro 6d15b82a3e cortex_a9::regs: init U bit for unaligned access 2019-06-04 23:47:23 +02:00
Astro 2df74cc055 add static exception handling 2019-05-30 20:30:19 +02:00
Astro 75bb755327 extend linker script 2019-05-27 22:38:10 +02:00
Astro 1033648c3e add l1_cache_init() 2019-05-23 19:05:06 +02:00
Astro 9b414e2408 PoC: boot, uart output in qemu 2019-05-05 14:56:23 +02:00