|
1634513bc7
|
mmu: align l1_table
|
2019-06-18 19:18:47 +02:00 |
|
|
9bebfb49bc
|
begin MMU implementation
|
2019-06-17 03:32:10 +02:00 |
|
|
69b65b5f72
|
cortex_a9 regs: allow defining bit fields
|
2019-06-17 01:36:11 +02:00 |
|
|
1e16beb707
|
cortex_a9::regs: use crate::regs interface
|
2019-06-12 00:20:23 +02:00 |
|
|
6d15b82a3e
|
cortex_a9::regs: init U bit for unaligned access
|
2019-06-04 23:47:23 +02:00 |
|
|
2df74cc055
|
add static exception handling
|
2019-05-30 20:30:19 +02:00 |
|
|
75bb755327
|
extend linker script
|
2019-05-27 22:38:10 +02:00 |
|
|
1033648c3e
|
add l1_cache_init()
|
2019-05-23 19:05:06 +02:00 |
|
|
9b414e2408
|
PoC: boot, uart output in qemu
|
2019-05-05 14:56:23 +02:00 |
|