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zynq-rs
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Code Pull Requests Activity
620 Commits 3 Branches 0 Tags 1.4 MiB
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149 Commits

Author SHA1 Message Date
mwojcik 42cc256812 add error led 2022-08-26 17:22:42 +08:00
mwojcik 1c8e2c318c eth phy: reset page to 0 on kasli-soc for ident 2022-03-10 17:11:41 +08:00
mwojcik c4c52c33b4 eth phy: use unreachable!() for impossible values 2022-03-10 16:45:29 +08:00
mwojcik 072fd5f015 eth phy: set LEDs only on Kasli-SoC 2022-03-10 16:42:25 +08:00
mwojcik 2b3c7e4b2f eth leds: 
* break led0 from led1 - similar, but not the same settings (led2 not implemented)
* fix values, make it compilable
* set default behavior (one led for link, other for activity)
 2022-03-10 16:42:25 +08:00
mwojcik 84d6d391ce libboard_zynq: eth phy for Marvell 88E1518 
* add support for LED control registers
* support for registers on different pages
 2022-03-10 16:42:25 +08:00
mwojcik 3e95df1f64 pca954x_select: api supports no channel enabled 2022-02-11 13:46:51 +08:00
mwojcik 26ab2927b9 pca954x: log detected type 2022-02-11 12:00:39 +08:00
mwojcik dacc816eb4 pca954x: improve code, fix I2C_SW_RESET behavior 2022-02-11 11:22:53 +08:00
mwojcik 14b0247716 pca954x: fix to work on cold boot 2022-02-09 17:23:33 +08:00
mwojcik bc41b91192 adjust pca address 2022-02-08 16:39:12 +08:00
mwojcik 3efc682bd6 add pca954x autodetection, pca9547 support 2022-02-08 15:40:17 +08:00
Sebastien Bourdeauducq 2c161720fa revert a11cb852a8 2021-07-05 13:45:22 +08:00
topquark12 a42e5a95ff phy: fix issue 78, scan PHY MDIO addr starting at 0 2021-07-05 13:25:22 +08:00
Sebastien Bourdeauducq b0ec74d764 i2c: half_period -> unit_delay 2021-06-25 16:26:53 +08:00
Sebastien Bourdeauducq 4159aab6c8 i2c: conservative timing, avoid SCL/SDA races. Closes #83 2021-06-25 16:26:04 +08:00
Sebastien Bourdeauducq d18c77c0eb i2c: fix error messages 2021-06-25 16:23:50 +08:00
Sebastien Bourdeauducq 411eebd96c i2c: configure I2C_SW_RESET MIO on Kasli-SoC 2021-06-19 18:49:51 +08:00
Sebastien Bourdeauducq a11cb852a8 libboard_zynq: work around Kasli-SoC MDIO breakage (#78) 2021-05-29 12:50:28 +08:00
Astro 1cd4056370 libboard_zynq: remove unused eth phy name information 2020-11-20 17:21:38 +01:00
Astro ddff295ae1 libboard_zynq: implement eth hot-plugging 2020-11-20 17:12:22 +01:00
Astro 379b6b973a libboard_zynq: add support for target_kasli_soc's Marvell88E1512 eth phy 2020-11-19 20:38:10 +01:00
Astro 3172aba1a8 libboard_zynq: improve i2c doc 2020-11-19 20:26:48 +01:00
Astro 975202a653 libboard_zynq: enable i2c+eeprom for target_kasli_soc 2020-11-19 20:17:36 +01:00
Astro a3eabf1947 libboard_zynq: prepare target_kasli_soc 2020-11-19 19:28:17 +01:00
Astro a32d7abb9a libboard_zynq: rename ddr DCI_FREQ to DCI_MAX_FREQ 2020-11-19 19:21:38 +01:00
Astro 0714162113 rename target_cora_z7_10 to target_coraz7 globally 2020-11-13 17:56:47 +01:00
Astro 5b2c779cba libboard_zynq: delint ps7_init 2020-11-13 00:23:56 +01:00
Astro 0a40d4f36d libboard_zynq: fix zc706 build 2020-11-13 00:23:38 +01:00
Astro 55f8d02da8 libboard_zynq: remove ddr-only ps7_init for redpitaya 2020-11-13 00:12:43 +01:00
Astro 990fa56d6a libboard_zynq: complete ddr without ps7_init for redpitaya 2020-11-13 00:10:34 +01:00
Astro 8fd317d580 libboard_zynq: remove ps7_init for cora_z7_10 2020-11-11 14:21:48 +01:00
Astro 07fedddad9 libboard_zynq: doc ddr size limitation, correct target_redpitaya to 512MB 2020-11-11 13:25:55 +01:00
Astro dffe3cb251 libboard_zynq: rm superfluous ddr settings for cora_z7_10 2020-11-10 20:53:46 +01:00
Astro b9323653bb libboard_zynq: complete ddr without ps7_init for cora_z7_10 2020-11-10 14:33:31 +01:00
Astro 515d3bb381 libboard_zynq: configure ddr while keeping rstb low 2020-11-08 22:47:59 +01:00
Astro 7e22010d7d libboard_zynq: fix pll_cp/pll_res swap in ClockSource::setup() 2020-11-08 22:46:43 +01:00
Astro 9ee77d8f44 libboard_zynq: indent ps7_init/cora_z7_10 2020-11-08 19:32:31 +01:00
Astro e508b78b3e libboard_zynq: add ps7_init for cora_z7_10 2020-11-08 19:28:59 +01:00
pca006132 f60d0589cc fix ps7_init compilation error and warnings 2020-10-01 00:17:47 +08:00
pca006132 c336e450b1 libboard_zynq/eth/phy: add PEF7071 2020-09-29 16:01:54 +08:00
pca006132 6af453494b libboard_zynq/ddr: use ps7_init for redpitaya ddr 2020-09-26 17:01:37 +08:00
Sebastien Bourdeauducq e601ac9c45 remove flash support 
PITA to get to work and most boards have SD.
 2020-09-09 20:13:13 +08:00
Sebastien Bourdeauducq a6955edf14 add Red Pitaya support (WIP) 2020-09-09 20:10:05 +08:00
pca006132 ae244082ed more cpu options 2020-09-07 16:13:51 +08:00
Sebastien Bourdeauducq 66c66447dd fix some compilation warnings 2020-09-06 00:17:59 +08:00
pca006132 a73df780d0 libboard_zynq/slcr: fixed boot mode pins value 
Notice that the bits in the table in UG585 are out of order.
 2020-08-31 12:35:11 +08:00
Sebastien Bourdeauducq 273f9ea72b libboard_zynq/eth: fix comment 2020-08-24 21:47:10 +08:00
pca006132 671968bac3 libboard_zynq/eth: fixed tx lost packet 2020-08-24 15:51:01 +08:00
pca006132 bb09d25378 libboard_zynq/ethernet: ethernet fix and config 2020-08-21 13:34:02 +08:00