Commit Graph

18 Commits

Author SHA1 Message Date
104d1ef232 openocd: name kasli_soc consistently 2021-06-25 16:45:38 +08:00
42cdedae91 openocd: fix Kasli-SoC nSRST 2021-05-29 12:17:59 +08:00
823ec374ba kasli-soc: internal JTAG 2021-05-28 18:44:07 +08:00
666c077cef openocd: add Kasli-SoC (with digilent external JTAG) 2021-05-28 18:22:17 +08:00
aef010cb14 openocd: remove xilinx-tcl on Cora Z7 2020-11-08 18:44:41 +01:00
a6955edf14 add Red Pitaya support (WIP) 2020-09-09 20:10:05 +08:00
a51f8f2eea openocd: remove ps7_init on Cora Z7 2020-09-09 15:00:09 +08:00
7680de26f0 openocd: sync with artiq-zynq 8bb1727e64 2020-09-09 14:58:18 +08:00
7695d6d8df openocd: fix cora z7-10 PL_TAPID 2020-05-16 01:34:09 +02:00
Stewart Mackenzie
43722eff8b add support for cora z7 in tmux script 2020-01-24 07:51:29 +08:00
Stewart Mackenzie
957228f134 document bitstream loading in readme and remove from zc706.cfg 2020-01-16 02:14:16 +08:00
Stewart Mackenzie
738ee32a51 improved the development process 2020-01-15 05:22:35 +08:00
Stewart Mackenzie
2e8d291ee7 running code causes board to fail in an unrecoverable manner
change to using the olimex-arm-usb-tiny and adjust openocd
srst settings so the failure is now recoverable
2020-01-03 18:07:07 +08:00
6e50b32e80 openocd: configure SRST for digilent_jtag_smt2_nc + Zynq
Digilent docs say Zynq boards should connect it to GPIO2.

Closes #2
2019-11-05 12:36:07 +08:00
43501003f9 openocd/zc706: decimate adapter_khz for reliability 2019-10-31 00:28:19 +01:00
06bc7ba809 openocd: fix PL_TAPID for both targets
Fixes Gitea issue #1
2019-09-28 23:53:40 +02:00
e135b27c13 openocd: fix PL_TAPID for both zc706 and cora-z7-10 2019-08-10 20:59:07 +02:00
5a8d714627 working openocd scripts for zc706 and cora-z7-10 2019-06-29 02:41:36 +02:00