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libboard_zynq: flush Uart by waiting for tx idle

This commit is contained in:
Astro 2020-05-02 23:32:01 +02:00
parent 0f666c570c
commit c955eaae7f
3 changed files with 4 additions and 3 deletions

View File

@ -29,6 +29,6 @@ impl log::Log for Logger {
} }
fn flush(&self) { fn flush(&self) {
let uart = stdio::get_uart(); let uart = stdio::get_uart();
while !uart.tx_fifo_empty() {} while !uart.tx_idle() {}
} }
} }

View File

@ -63,6 +63,7 @@ macro_rules! println {
let mut uart = $crate::stdio::get_uart(); let mut uart = $crate::stdio::get_uart();
let _ = write!(uart, $($arg)*); let _ = write!(uart, $($arg)*);
let _ = write!(uart, "\n"); let _ = write!(uart, "\n");
while !uart.tx_fifo_empty() {} // flush after the newline
while !uart.tx_idle() {}
}) })
} }

View File

@ -221,7 +221,7 @@ impl embedded_hal::serial::Write<u8> for Uart {
} }
fn flush(&mut self) -> nb::Result<(), Void> { fn flush(&mut self) -> nb::Result<(), Void> {
if self.tx_fifo_empty() { if self.tx_idle() {
Ok(()) Ok(())
} else { } else {
Err(nb::Error::WouldBlock) Err(nb::Error::WouldBlock)