fsagbuya/zynq-rs
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main: add UART_RATE

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Astro 2019-05-31 00:19:01 +02:00
parent 2f27ff574f
commit bf4f5108f4
1 changed files with 3 additions and 1 deletions
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4
src/main.rs
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@ -73,8 +73,10 @@ fn l1_cache_init() {
asm::isb();
}
const UART_RATE: u32 = 115_200;
fn main() {
let mut uart = Uart::serial(115_200);
let mut uart = Uart::serial(UART_RATE);
loop {
for i in 0.. {
writeln!(uart, "i={}\r", i);