forked from M-Labs/zynq-rs
uart: impl fmt::Write
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@ -4,6 +4,8 @@
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//[feature(global_asm)]
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#![feature(naked_functions)]
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use core::fmt::Write;
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use panic_abort as _;
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use r0::zero_bss;
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@ -44,8 +46,6 @@ pub unsafe extern "C" fn _boot_cores() -> ! {
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}
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fn main() {
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let uart = Uart::uart0();
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for b in "Hello World\r\n".bytes() {
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uart.write_byte(b);
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}
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let mut uart = Uart::uart0();
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writeln!(uart, "Hello World\r").unwrap();
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}
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@ -1,5 +1,7 @@
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#![allow(unused)]
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use core::fmt;
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mod regs;
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pub use regs::RegisterBlock;
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@ -32,3 +34,12 @@ impl Uart {
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self.regs.write_byte(v);
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}
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}
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impl fmt::Write for Uart {
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fn write_str(&mut self, s: &str) -> Result<(), fmt::Error> {
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for b in s.bytes() {
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self.write_byte(b);
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}
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Ok(())
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}
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}
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