forked from M-Labs/zynq-rs
add l1_cache_init()
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179c617904
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1033648c3e
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@ -9,3 +9,21 @@ pub fn nop() {
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pub fn wfe() {
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unsafe { asm!("wfe" :::: "volatile") }
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}
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/// Data Memory Barrier
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#[inline]
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pub fn dmb() {
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unsafe { asm!("dmb" :::: "volatile") }
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}
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/// Data Synchronization Barrier
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#[inline]
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pub fn dsb() {
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unsafe { asm!("dsb" :::: "volatile") }
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}
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/// Instruction Synchronization Barrier
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#[inline]
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pub fn isb() {
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unsafe { asm!("isb" :::: "volatile") }
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}
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@ -36,3 +36,39 @@ def_reg_set!(SP, u32, "mov sp, $0");
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pub struct MPIDR;
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def_reg_get!(MPIDR, u32, "mrc p15, 0, $0, c0, c0, 5");
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/// Invalidate TLBs
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pub fn tlbiall() {
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unsafe {
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asm!("mcr p15, 0, $0, c8, c7, 0" :: "r" (0) :: "volatile");
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}
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}
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/// Invalidate I-Cache
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pub fn iciallu() {
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unsafe {
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asm!("mcr p15, 0, $0, c7, c5, 0" :: "r" (0) :: "volatile");
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}
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}
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/// Invalidate Branch Predictor Array
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pub fn bpiall() {
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unsafe {
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asm!("mcr p15, 0, $0, c7, c5, 6" :: "r" (0) :: "volatile");
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}
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}
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/// Invalidate D-Cache
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pub fn dccisw() {
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// TODO: $0 is r11 at what value?
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unsafe {
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asm!("mcr p15, 0, $0, c7, c5, 6" :: "r" (0) :: "volatile");
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}
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}
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/// Enable I-Cache and D-Cache
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pub fn sctlr() {
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unsafe {
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asm!("mcr p15, 0, $0, c1, c0, 0" :: "r" (0x1004) :: "volatile");
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}
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}
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27
src/main.rs
27
src/main.rs
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@ -15,6 +15,8 @@ mod uart;
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use uart::Uart;
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mod eth;
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use crate::cortex_a9::{asm, regs::*};
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extern "C" {
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static mut __bss_start: u32;
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static mut __bss_end: u32;
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@ -25,8 +27,6 @@ extern "C" {
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#[no_mangle]
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#[naked]
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pub unsafe extern "C" fn _boot_cores() -> ! {
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use cortex_a9::{asm, regs::*};
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const CORE_MASK: u32 = 0x3;
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let stack_start = __end + 4096;
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@ -43,11 +43,34 @@ pub unsafe extern "C" fn _boot_cores() -> ! {
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}
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unsafe fn boot_core0() -> ! {
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l1_cache_init();
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zero_bss(&mut __bss_start, &mut __bss_end);
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main();
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panic!("return from main");
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}
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fn l1_cache_init() {
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// Invalidate TLBs
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tlbiall();
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// Invalidate I-Cache
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iciallu();
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// Invalidate Branch Predictor Array
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bpiall();
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// Invalidate D-Cache
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dccisw();
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// (Initialize MMU)
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// Enable I-Cache and D-Cache
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sctlr();
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// Synchronization barriers
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// Allows MMU to start
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asm::dsb();
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// Flushes pre-fetch buffer
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asm::isb();
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}
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fn main() {
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let mut uart = Uart::uart1(115_200);
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loop {
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