fsagbuya
/
zynq-rs
forked from M-Labs/zynq-rs
1
0
Fork 0
Code Pull Requests Activity

libboard_zynq: remove unneeded Uart flush

This commit is contained in:
Astro 2020-05-02 23:30:45 +02:00
parent e047c2900b
commit 0f666c570c
1 changed files with 3 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
libboard_zynq/src/uart/mod.rs
View File

@ -192,15 +192,14 @@ impl Uart {
self.regs.channel_sts.read().txfull() self.regs.channel_sts.read().txfull()
} }
pub fn tx_fifo_empty(&self) -> bool { pub fn tx_idle(&self) -> bool {
self.regs.channel_sts.read().txempty() let status = self.regs.channel_sts.read();
status.txempty() && !status.tactive()
} }
} }
impl fmt::Write for Uart { impl fmt::Write for Uart {
fn write_str(&mut self, s: &str) -> Result<(), fmt::Error> { fn write_str(&mut self, s: &str) -> Result<(), fmt::Error> {
while !self.tx_fifo_empty() {}
for b in s.bytes() { for b in s.bytes() {
self.write_byte(b); self.write_byte(b);
} }