forked from M-Labs/zynq-rs
started writing register definitions
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use volatile_register::{RO, RW, WO};
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use libregister::{register, register_at, register_bit, register_bits, register_bits_typed};
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#[allow(unused)]
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#[repr(u8)]
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pub enum CommandType {
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Normal = 0b00,
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Suspend = 0b01,
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Resume = 0b10,
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Abort = 0b11,
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}
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#[allow(unused)]
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#[repr(u8)]
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pub enum ResponseTypeSelect {
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NoResponse = 0b00,
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Length136 = 0b01,
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Length48 = 0b10,
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Legnth48Check = 0b11,
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}
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#[repr(C)]
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pub struct RegisterBlock {
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pub sdma_system_address: RM<u32>,
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pub block_size_block_count: BockSizeBlockCount,
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pub argument: RW<u32>,
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pub transfer_mode_command: TransferModeCommand,
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pub responses: [RO<u32>; 4],
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pub buffer: RW<u32>,
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pub present_state: PresentState,
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}
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register_at!(RegisterBlock, 0xE0100000, sd0);
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register_at!(RegisterBlock, 0xE0101000, sd1);
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register!(block_size_block_count, BlockSizeBlockCount, RW, u32);
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register_bits!(
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block_size_block_count,
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/// Current transfer block count.
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blocks_count,
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u16,
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16,
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31
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);
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register_bits!(
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block_size_block_count,
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/// Host SDMA Buffer Size, size = 2^(val + 2) KB.
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dma_buffer_size,
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u8,
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12,
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14
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);
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register_bits!(
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block_size_block_count,
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/// Block size for data transfer. Unit: byte.
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transfer_block_size,
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u16,
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0,
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11
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);
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register!(transfer_mode_command, TransferModeCommand, RW, u32);
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register_bits!(
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transfer_mode_command,
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/// Command Number.
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command_index,
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u8,
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24,
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29
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);
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register_bits_typed!(
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transfer_mode_command,
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/// Command type register.
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command_type,
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u8,
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CommandType,
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24,
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29
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);
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register_bit!(
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transfer_mode_command,
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/// 1 if data is present and shall be transferred using the DAT line.
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data_present_select,
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21
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);
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register_bit!(
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transfer_mode_command,
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/// If the index field shall be checked.
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index_check_en,
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20
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);
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register_bit!(
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transfer_mode_command,
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/// If CRC shall be checked.
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crc_check_en,
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19
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);
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register_bits_typed!(
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transfer_mode_command,
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/// Different type of response.
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response_type_select,
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u8,
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ResponseTypeSelect,
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16,
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17
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);
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register_bit!(
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transfer_mode_command,
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/// Enables the multi block DAT line data transfer.
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multi_block_en,
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5
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);
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register_bit!(
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transfer_mode_command,
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/// 1 if read (card to host), 0 if write (host to card).
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direction_select,
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4
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);
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register_bit!(
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transfer_mode_command,
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/// If CMD12 shall be issued automatically when last block transfer is completed.
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auto_cmd12_en,
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2
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);
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register_bit!(
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transfer_mode_command,
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/// Enable the block count register.
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block_count_en,
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1
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);
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register_bit!(
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transfer_mode_command,
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/// Enable DMA,
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dma_en,
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0
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);
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register!(present_state, PresentState, RO, u32);
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register_bit!(
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present_state,
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/// CMD Line Signal Level.
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cmd_line_level,
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24
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);
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register_bit!(
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present_state,
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/// Signal level in DAT[3]
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dat3_level,
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23
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);
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register_bit!(
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present_state,
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/// Signal level in DAT[2]
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dat2_level,
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22
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);
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register_bit!(
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present_state,
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/// Signal level in DAT[1]
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dat1_level,
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21
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);
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register_bit!(
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present_state,
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/// Signal level in DAT[0]
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dat0_level,
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20
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);
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register_bit!(
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present_state,
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/// Write enabled and inverse of SDx_WP pin level.
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write_enabled,
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19
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);
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register_bit!(
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present_state,
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/// Card detected and inverse of SDx_CDn pin level.
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card_detected,
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18
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);
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regsiter_bit!(
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present_state,
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card_state_stable,
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17
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);
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register_bit!(
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present_state,
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card_inserted,
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16
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);
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register_bit!(
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present_state,
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buffer_read_en,
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11,
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);
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register_bit!(
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present_state,
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buffer_write_en,
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10
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);
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register_bit!(
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present_state,
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read_transfer_active,
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9
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);
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register_bit!(
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present_state,
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write_transfer_active,
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8
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);
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register_bit!(
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present_state,
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dat_line_active,
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2
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);
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register_bit!(
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present_state,
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command_inhibit_dat,
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1
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);
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register_bit!(
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present_state,
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command_inhibit_cmd,
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0
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);
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