forked from M-Labs/nac3
nac3embedded: switch to Zynq (#24)
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@ -1,13 +1,16 @@
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# python demo.py
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# artiq_run module.elf
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core_addr = "192.168.1.50"
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device_db = {
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"core": {
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"type": "local",
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"module": "artiq.coredevice.core",
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"class": "Core",
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"arguments": {"host": core_addr, "ref_period": 1e-9}
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"arguments": {
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"host": "192.168.1.52",
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"ref_period": 1e-9,
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"ref_multiplier": 8,
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"target": "cortexa9"
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}
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},
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}
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@ -147,14 +147,18 @@ impl Nac3 {
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builder.populate_module_pass_manager(&passes);
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passes.run_on(module);
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let triple = TargetTriple::create("riscv32-unknown-linux");
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// For RISC-V (needs https://git.m-labs.hk/M-Labs/nac3/issues/24)
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//let triple = TargetTriple::create("riscv32-unknown-linux");
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//let features = "+a,+m";
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let triple = TargetTriple::create("armv7-unknown-linux-gnueabihf");
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let features = "+dsp,+fp16,+neon,+vfp3";
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let target =
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Target::from_triple(&triple).expect("couldn't create target from target triple");
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let target_machine = target
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.create_target_machine(
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&triple,
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"",
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"+a,+m",
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features,
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OptimizationLevel::Default,
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RelocMode::PIC,
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CodeModel::Default,
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