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master ... pcap

Author SHA1 Message Date
Stewart Mackenzie 8f9b8a7f3d WIP 2020-01-23 05:06:04 +08:00
6 changed files with 149 additions and 7 deletions

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@ -3,7 +3,10 @@
use core::mem::transmute;
use libcortex_a9::mutex::Mutex;
use libboard_zynq::{print, println, self as zynq};
use libboard_zynq::{print, println, self as zynq,
dmac::{DmaC},
devc::{DevC},
};
use libboard_zc706::{
ram, alloc::{vec, vec::Vec},
boot,
@ -13,6 +16,8 @@ use libboard_zc706::{
smoltcp::socket::SocketSet,
smoltcp::socket::{TcpSocket, TcpSocketBuffer},
};
mod pl_config;
use pl_config::load_pl;
const HWADDR: [u8; 6] = [0, 0x23, 0xde, 0xea, 0xbe, 0xef];
@ -20,6 +25,8 @@ static mut STACK_CORE1: [u32; 512] = [0; 512];
#[no_mangle]
pub fn main_core0() {
let mut devc = DevC::new();
load_pl(&mut devc);
// zynq::clocks::CpuClocks::enable_io(1_250_000_000);
println!("\nzc706 main");
{

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@ -0,0 +1,17 @@
use libboard_zynq::{print, println, self as zynq,
devc::{DevC},
};
pub fn load_pl(devc: &mut DevC) {
devc.enable_and_select_pcap();
devc.clear_interrupts(); // removed despite TRM suggestion
devc.initialize_pl();
devc.wait_for_pl_to_be_ready();
devc.wait_for_command_queue_space();
devc.disable_pcap_loopback();
devc.enable_pcap_non_secure_mode();
// load pcap
//devc.wait_for_dma_transfer();
}

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@ -1,8 +1,9 @@
use core::fmt;
use libregister::*;
mod regs;
use crate::println;
pub struct DevC {
regs: &'static mut regs::RegisterBlock,
}
@ -14,16 +15,117 @@ impl DevC {
}
}
pub fn enable(&mut self) {
pub fn enable_and_select_pcap(&mut self) {
self.regs.control.modify(|_, w| {
w.pcap_mode(true)
.pcap_pr(true)
.pcap_pr(true)
})
}
pub fn disable(&mut self) {
pub fn enable_and_select_icap(&mut self) {
self.regs.control.modify(|_, w| {
w.pcap_mode(false)
w.pcap_mode(true)
.pcap_pr(false)
})
}
pub fn clear_interrupts(&mut self) {
self.regs.int_sts.modify(|_, w| {
w.pps_gts_usr_b_int(true)
.pps_fst_cfg_b_int(true)
.pps_gpwrdwn_b_int(true)
.pps_gts_cfg_b_int(true)
.pps_cfg_reset_b_int(true)
.ixr_axi_wto(true)
.ixr_axi_werr(true)
.ixr_axi_rto(true)
.ixr_axi_rerr(true)
.ixr_rx_fifo_ov(true)
.ixr_wr_fifo_lvl(true)
.ixr_rd_fifo_lvl(true)
.ixr_dma_cmd_err(true)
.ixr_dma_q_ov(true)
.ixr_dma_done(true)
.ixr_d_p_done(true)
.ixr_p2d_len_err(true)
.ixr_pcfg_hmac_err(true)
.ixr_pcfg_seu_err(true)
.ixr_pcfg_por_b(true)
.ixr_pcfg_cfg_rst(true)
.ixr_pcfg_done(true)
.ixr_pcfg_init_pe(true)
.ixr_pcfg_init_ne(true)
})
}
pub fn initialize_pl(&mut self) {
self.regs.mctrl.modify(|_, w| {
w.pcfg_por_b(true)
.pcfg_por_b(false)
});
self.wait_for_status_pcfg_init_to_be(false);
self.regs.mctrl.modify(|_, w| {
w.pcfg_por_b(true)
});
self.regs.int_sts.modify(|_,w| {
w.ixr_pcfg_done(true)
});
}
pub fn wait_for_pl_to_be_ready(&self) {
self.wait_for_status_pcfg_init_to_be(true)
}
pub fn wait_for_command_queue_space(&self){
self.wait_for_status_dma_cmd_q_f_to_be(false);
}
pub fn disable_pcap_loopback(&mut self) {
self.regs.mctrl.modify(|_,w| {
w.pcap_lpbk(false)
});
}
pub fn enable_pcap_secure_mode(&mut self) {
self.regs.control.modify(|_, w| {
w.pcap_rate_en(true)
});
}
pub fn enable_pcap_non_secure_mode(&mut self) {
self.regs.control.modify(|_, w| {
w.pcap_rate_en(false)
});
}
pub fn wait_for_dma_transfer(&self) {
self.wait_for_int_sts_ixr_dma_done_to_be(true);
}
fn wait_for_status_pcfg_init_to_be(&self, value: bool) {
loop {
let status = self.regs.status.read();
println!("expected value: {}, actual pcfg_init: {}",value, status.pcfg_init());
if value == status.pcfg_init() {
return
}
}
}
fn wait_for_status_dma_cmd_q_f_to_be(&self, value: bool) {
loop {
let status = self.regs.status.read();
if value == status.pcfg_init() {
return
}
}
}
fn wait_for_int_sts_ixr_dma_done_to_be(&self, value: bool) {
loop {
let int_sts = self.regs.int_sts.read();
if value == int_sts.ixr_dma_done() {
return
}
}
}
}

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@ -101,7 +101,7 @@ register_bit!(int_sts, ixr_pcfg_hmac_err, 6);
register_bit!(int_sts, ixr_pcfg_seu_err, 5);
register_bit!(int_sts, ixr_pcfg_por_b, 4);
register_bit!(int_sts, ixr_pcfg_cfg_rst, 3);
register_bit!(int_sts, ixr_pcfg_done, 2);
register_bit!(int_sts, ixr_pcfg_done, 2); // seems to be PCFG_DONE_INT on pg 218 in TRM
register_bit!(int_sts, ixr_pcfg_init_pe, 1);
register_bit!(int_sts, ixr_pcfg_init_ne, 0);

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@ -1 +1,16 @@
use core::fmt;
use libregister::*;
mod regs;
pub struct DmaC {
regs: &'static mut regs::RegisterBlock,
}
impl DmaC {
pub fn new() -> Self {
DmaC {
regs: regs::RegisterBlock::dmac0_ns(),
}
}
}

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@ -4,6 +4,7 @@ pub mod slcr;
pub mod clocks;
pub mod uart;
pub mod devc;
pub mod dmac;
pub mod stdio;
pub mod eth;
pub mod axi_hp;