forked from M-Labs/zynq-rs
pca954x: improve code, fix I2C_SW_RESET behavior
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fbc783d7ad
commit
dacc816eb4
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@ -7,7 +7,7 @@ use super::time::Microseconds;
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use embedded_hal::timer::CountDown;
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use embedded_hal::timer::CountDown;
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use libregister::{RegisterR, RegisterRW, RegisterW};
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use libregister::{RegisterR, RegisterRW, RegisterW};
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enum PCA954X {
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pub enum I2cMultiplexer {
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PCA9548 = 0,
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PCA9548 = 0,
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#[cfg(feature = "target_kasli_soc")]
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#[cfg(feature = "target_kasli_soc")]
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PCA9547 = 1,
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PCA9547 = 1,
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@ -16,7 +16,7 @@ enum PCA954X {
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pub struct I2c {
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pub struct I2c {
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regs: regs::RegisterBlock,
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regs: regs::RegisterBlock,
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count_down: super::timer::global::CountDown<Microseconds>,
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count_down: super::timer::global::CountDown<Microseconds>,
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pca_type: PCA954X
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pca_type: I2cMultiplexer
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}
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}
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impl I2c {
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impl I2c {
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@ -63,7 +63,7 @@ impl I2c {
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let self_ = Self {
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let self_ = Self {
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regs: regs::RegisterBlock::i2c(),
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regs: regs::RegisterBlock::i2c(),
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count_down: unsafe { super::timer::GlobalTimer::get() }.countdown(),
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count_down: unsafe { super::timer::GlobalTimer::get() }.countdown(),
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pca_type: PCA954X::PCA9548
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pca_type: I2cMultiplexer::PCA9548 //default for zc706
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};
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};
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// Setup GPIO output mask
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// Setup GPIO output mask
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@ -75,7 +75,7 @@ impl I2c {
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w.scl(true).sda(true)
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w.scl(true).sda(true)
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});
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});
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//Kasli-SoC exclusive: I2C_SW_RESET configuration
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//Kasli-SoC only: I2C_SW_RESET configuration
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#[cfg(feature = "target_kasli_soc")]
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#[cfg(feature = "target_kasli_soc")]
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{
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{
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self_.regs.gpio_output_mask_lower.modify(|_, w| {
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self_.regs.gpio_output_mask_lower.modify(|_, w| {
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@ -144,12 +144,14 @@ impl I2c {
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}
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}
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#[cfg(feature = "target_kasli_soc")]
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#[cfg(feature = "target_kasli_soc")]
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pub fn pca_autodetect(&mut self) -> Result<PCA954X, &'static str> {
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fn pca_autodetect(&mut self) -> Result<I2cMultiplexer, &'static str> {
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// start with resetting the PCA954X
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// start with resetting the PCA954X
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// SDA must be clear (before start)
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/*self.i2cswr_oe(false);
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// reset time is 500ns, unit_delay (100us) to account for propagation
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self.i2cswr_o(true);
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self.unit_delay();
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self.i2cswr_o(false);
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self.unit_delay();
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self.unit_delay();
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self.i2cswr_oe(true);*/
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let pca954x_read_addr = (0x71 << 1) | 0x01;
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let pca954x_read_addr = (0x71 << 1) | 0x01;
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@ -161,8 +163,8 @@ impl I2c {
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let config = self.read(false)?;
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let config = self.read(false)?;
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let pca = match config {
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let pca = match config {
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0x00 => PCA954X::PCA9548,
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0x00 => I2cMultiplexer::PCA9548,
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0x08 => PCA954X::PCA9547,
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0x08 => I2cMultiplexer::PCA9547,
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_ => { return Err("Unknown response for PCA954X autodetect")},
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_ => { return Err("Unknown response for PCA954X autodetect")},
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};
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};
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self.stop()?;
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self.stop()?;
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@ -198,7 +200,7 @@ impl I2c {
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#[cfg(feature = "target_kasli_soc")]
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#[cfg(feature = "target_kasli_soc")]
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{
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{
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self.unit_delay();
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self.i2cswr_oe(true);
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self.pca_type = self.pca_autodetect()?;
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self.pca_type = self.pca_autodetect()?;
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}
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}
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@ -300,18 +302,18 @@ impl I2c {
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pub fn pca954x_select(&mut self, address: u8, channel: u8) -> Result<(), &'static str> {
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pub fn pca954x_select(&mut self, address: u8, channel: u8) -> Result<(), &'static str> {
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self.start()?;
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self.start()?;
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// PCA9547 supports only one channel at a time
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// PCA9547 supports only one channel at a time
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// for compatibility, PCA9548 is treated as such
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// for compatibility, PCA9548 is treated as such too
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let setting = match self.pca_type {
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let setting = match self.pca_type {
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PCA954X::PCA9548 => 1 << channel,
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I2cMultiplexer::PCA9548 => 1 << channel,
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#[cfg(feature = "target_kasli_soc")]
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#[cfg(feature = "target_kasli_soc")]
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PCA954X::PCA9547 => channel | 0x08,
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I2cMultiplexer::PCA9547 => channel | 0x08,
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};
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};
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if !self.write(address << 1)? {
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if !self.write(address << 1)? {
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return Err("PCA9548 failed to ack write address")
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return Err("PCA954X failed to ack write address")
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}
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}
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if !self.write(setting)? {
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if !self.write(setting)? {
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return Err("PCA9548 failed to ack control word")
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return Err("PCA954X failed to ack control word")
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}
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}
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self.stop()?;
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self.stop()?;
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Ok(())
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Ok(())
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