forked from M-Labs/zynq-rs
experiments: enabled L2 cache
...and removed some trailing spaces
This commit is contained in:
parent
7cb2669c3b
commit
a1f859637a
@ -27,6 +27,7 @@ use libboard_zynq::{
|
|||||||
};
|
};
|
||||||
use libcortex_a9::{
|
use libcortex_a9::{
|
||||||
mutex::Mutex,
|
mutex::Mutex,
|
||||||
|
l2c::enable_l2_cache,
|
||||||
sync_channel::{Sender, Receiver},
|
sync_channel::{Sender, Receiver},
|
||||||
sync_channel,
|
sync_channel,
|
||||||
regs::{MPIDR, SP},
|
regs::{MPIDR, SP},
|
||||||
@ -86,6 +87,7 @@ pub fn restart_core1() {
|
|||||||
#[no_mangle]
|
#[no_mangle]
|
||||||
pub fn main_core0() {
|
pub fn main_core0() {
|
||||||
// zynq::clocks::CpuClocks::enable_io(1_250_000_000);
|
// zynq::clocks::CpuClocks::enable_io(1_250_000_000);
|
||||||
|
enable_l2_cache();
|
||||||
println!("\nzc706 main");
|
println!("\nzc706 main");
|
||||||
let mut interrupt_controller = gic::InterruptController::gic(mpcore::RegisterBlock::mpcore());
|
let mut interrupt_controller = gic::InterruptController::gic(mpcore::RegisterBlock::mpcore());
|
||||||
interrupt_controller.enable_interrupts();
|
interrupt_controller.enable_interrupts();
|
||||||
|
Loading…
Reference in New Issue
Block a user