ab0c205dd2
gateware: add DRTIO
...
Reviewed-on: M-Labs/artiq-zynq#140
Co-authored-by: mwojcik <mw@m-labs.hk>
Co-committed-by: mwojcik <mw@m-labs.hk>
2021-10-08 16:12:30 +08:00
18e05c91e1
zc706: si5324 is not needed for standalone target
2021-08-04 09:14:19 +08:00
e3d3cb2311
si5324: bring on par with mainline ARTIQ ( #132 )
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si5324 driver in runtime should be now equal in function to the one in artiq.
kasli-soc has no way of doing a hard reset on the peripheral, but zc706 does.
Reviewed-on: M-Labs/artiq-zynq#132
Co-authored-by: mwojcik <mw@m-labs.hk>
Co-committed-by: mwojcik <mw@m-labs.hk>
2021-08-04 09:12:38 +08:00
506c741238
support absence of gateware RTIO clock selection mux
2021-02-15 21:41:30 +08:00
1e20259c36
fix acpki selection
2020-08-04 13:26:45 +08:00
f8d4036451
add ACP kernel initiator
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Based on work by Chris Ballance
https://github.com/m-labs/artiq/issues/1167#issuecomment-427188287
M-Labs/artiq-zynq#55
Work-in-progress, only gateware part and build system, untested.
2020-08-04 13:15:26 +08:00
523524c319
zc706: add RTIO log channels
2020-07-19 14:05:35 +08:00
f69e41af5e
gateware: fix VADJ I/O standard conflict
2020-07-16 17:58:31 +08:00
6a361893c2
gateware: make LEDs common to all variants
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Makes quick testing easier.
2020-07-16 17:36:27 +08:00
8e758ecc17
add RTIO analyzer core (untested)
2020-07-15 23:06:34 +08:00
a7073edf79
add DMA core (untested)
2020-07-13 10:37:17 +08:00
e3ff21b1b5
create gateware folder
2020-07-11 17:49:54 +08:00
