forked from M-Labs/zynq-rs
60 lines
1.7 KiB
Rust
60 lines
1.7 KiB
Rust
//! AXI_HP Interface (AFI)
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use volatile_register::RW;
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use libregister::{register, register_bit, register_bits};
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pub unsafe fn axi_hp0() -> &'static RegisterBlock {
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&*(0xF8008000 as *const _)
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}
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pub unsafe fn axi_hp1() -> &'static RegisterBlock {
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&*(0xF8009000 as *const _)
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}
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pub unsafe fn axi_hp2() -> &'static RegisterBlock {
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&*(0xF800A000 as *const _)
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}
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pub unsafe fn axi_hp3() -> &'static RegisterBlock {
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&*(0xF800B000 as *const _)
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}
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#[repr(C)]
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pub struct RegisterBlock {
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/// Read Channel Control Register
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pub rdchan_ctrl: RdchanCtrl,
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/// Read Issuing Capability Register
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pub rdchan_issuingcap: RW<u32>,
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/// QOS Read Channel Register
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pub rdqos: RW<u32>,
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/// Read Data FIFO Level Register
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pub rddatafifo_level: RW<u32>,
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/// Read Channel Debug Register
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pub rddebug: RW<u32>,
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/// Write Channel Control Register
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pub wrchan_ctrl: WrchanCtrl,
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/// Write Issuing Capability Register
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pub wrchan_issuingcap: RW<u32>,
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/// QOS Write Channel Register
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pub wrqos: RW<u32>,
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/// Write Data FIFO Level Register
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pub wrdatafifo_level: RW<u32>,
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/// Write Channel Debug Register
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pub wrdebug: RW<u32>,
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}
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register!(rdchan_ctrl, RdchanCtrl, RW, u32);
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register_bit!(rdchan_ctrl, en_32bit, 0);
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register_bit!(rdchan_ctrl, fabric_qos_en, 1);
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register_bit!(rdchan_ctrl, fabric_out_cmd_en, 2);
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register_bit!(rdchan_ctrl, qos_head_of_cmd_q_en, 3);
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register!(wrchan_ctrl, WrchanCtrl, RW, u32);
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register_bit!(wrchan_ctrl, en_32bit, 0);
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register_bit!(wrchan_ctrl, fabric_qos_en, 1);
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register_bit!(wrchan_ctrl, fabric_out_cmd_en, 2);
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register_bit!(wrchan_ctrl, qos_head_of_cmd_q_en, 3);
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register_bits!(wrchan_ctrl, wr_cmd_release_mode, u8, 4, 5);
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register_bits!(wrchan_ctrl, wr_data_threshold, u8, 8, 11);
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