4 Commits

Author	SHA1	Message	Date
Brad Bondurant	79a0d72976	zync_us/slcr: add MIO SLCRs	2022-11-16 08:54:05 -05:00
Brad Bondurant	2b3045b46c	zync_us: start defining SLCR blocks	2022-11-15 16:20:09 -05:00
Brad Bondurant	2c179841be	zynq_us/uart: same register fields as zynq, just a different location ... BDIV_MIN/MAX and CD_MAX are also the same	2022-11-15 16:14:42 -05:00
Brad Bondurant	508fac66e8	add crate for ultrascale+ drivers	2022-11-15 16:05:29 -05:00