11 Commits (188954ddc7d644c59598edfb650381976a546eef)

Author	SHA1	Message	Date
Brad Bondurant	3a6517b8db	libboard_zynq/uart: re-export regs and baudgen for use in US+	2022-11-15 15:57:28 -05:00
Astro	a3eabf1947	libboard_zynq: prepare target_kasli_soc	2020-11-19 19:28:17 +01:00
Astro	0714162113	rename target_cora_z7_10 to target_coraz7 globally	2020-11-13 17:56:47 +01:00
Sebastien Bourdeauducq	a6955edf14	add Red Pitaya support (WIP)	2020-09-09 20:10:05 +08:00
Harry Ho	36947104e3	libboard_zynq: make constructor names more consistent	2020-08-13 13:31:53 +08:00
Astro	c955eaae7f	libboard_zynq: flush Uart by waiting for tx idle	2020-05-02 23:32:01 +02:00
Astro	0f666c570c	libboard_zynq: remove unneeded Uart flush	2020-05-02 23:30:45 +02:00
Astro	4ab6fb6271	libboard_zynq: use Void in uart embedded_hal impl	2020-04-25 00:28:17 +02:00
Astro	04c47b9bdb	libboard_zynq: impl embedded_hal serial write traits for Uart	2020-04-24 21:31:37 +02:00
Astro	aae85981e2	libboard_zynq::clocks: setup clock sources and cpu clock	2020-01-23 23:15:10 +01:00
Astro	cf1983e543	split into lib{register, cortex_a9, board_zynq, board_zc706} crates	2019-12-17 23:35:58 +01:00