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zynq-rs
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libboard_zynq: fix flash read

This commit is contained in:
Astro 2020-04-06 22:02:10 +02:00
parent ab2a8db4d3
commit c3ebafa6ed
2 changed files with 14 additions and 10 deletions
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22
libboard_zynq/src/flash/mod.rs
View File

@ -22,7 +22,10 @@ pub const PAGE_SIZE: u32 = 0x100;
/// Instruction: Read Identification /// Instruction: Read Identification
const INST_RDID: u8 = 0x9F; const INST_RDID: u8 = 0x9F;
/// Instruction: Read
const INST_READ: u8 = 0x03; const INST_READ: u8 = 0x03;
/// Instruction: Quad I/O Fast Read
const INST_4IO_FAST_READ: u8 = 0xEB;
/// Instruction: Write Disable /// Instruction: Write Disable
const INST_WRDI: u8 = 0x04; const INST_WRDI: u8 = 0x04;
/// Instruction: Write Enable /// Instruction: Write Enable
@ -291,14 +294,14 @@ impl Flash<()> {
self.regs.lqspi_cfg.write(regs::LqspiCfg::zeroed() self.regs.lqspi_cfg.write(regs::LqspiCfg::zeroed()
// Quad I/O Fast Read // Quad I/O Fast Read
.inst_code(0xEB) .inst_code(INST_4IO_FAST_READ)
.dummy_mask(0x2)
.mode_en(false)
.mode_bits(0xFF) .mode_bits(0xFF)
.dummy_byte(0x2)
.mode_en(true)
// 2 devices // 2 devices
.two_mem(true) .two_mem(true)
.u_page(false) .u_page(false)
// Linear Addressing Mode // Quad SPI mode
.lq_mode(true) .lq_mode(true)
); );
@ -318,14 +321,15 @@ impl Flash<()> {
); );
self.regs.lqspi_cfg.write(regs::LqspiCfg::zeroed() self.regs.lqspi_cfg.write(regs::LqspiCfg::zeroed()
// Quad I/O Fast Read
.inst_code(INST_READ)
.dummy_mask(0x2)
.mode_en(false)
.mode_bits(0xFF) .mode_bits(0xFF)
.dummy_byte(0x2)
.mode_en(true)
// 2 devices // 2 devices
.two_mem(true) .two_mem(true)
.sep_bus(true) .u_page(false)
.u_page(chip_index != 0) // Quad SPI mode
// Manual I/O mode
.lq_mode(false) .lq_mode(false)
); );

2
libboard_zynq/src/flash/regs.rs
View File

@ -116,7 +116,7 @@ register_bit!(qspi_gpio,
register!(lqspi_cfg, LqspiCfg, RW, u32); register!(lqspi_cfg, LqspiCfg, RW, u32);
register_bits!(lqspi_cfg, inst_code, u8, 0, 7); register_bits!(lqspi_cfg, inst_code, u8, 0, 7);
register_bits!(lqspi_cfg, dummy_byte, u8, 8, 10); register_bits!(lqspi_cfg, dummy_mask, u8, 8, 10);
register_bits!(lqspi_cfg, mode_bits, u8, 16, 23); register_bits!(lqspi_cfg, mode_bits, u8, 16, 23);
register_bit!(lqspi_cfg, mode_on, 24); register_bit!(lqspi_cfg, mode_on, 24);
register_bit!(lqspi_cfg, mode_en, 25); register_bit!(lqspi_cfg, mode_en, 25);