forked from M-Labs/zynq-rs
szl: move enable l2c to artiq-zynq
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@ -20,7 +20,6 @@ use libconfig::{bootgen, sd_reader, Config};
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use libcortex_a9::{
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asm::{dsb, isb},
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cache::{bpiall, dcciall, iciallu},
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l2c::enable_l2_cache,
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};
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use libregister::RegisterR;
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use libsupport_zynq::ram;
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@ -80,7 +79,6 @@ pub fn main_core0() {
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"#
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);
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info!("Simple Zynq Loader starting...");
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enable_l2_cache();
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const CPU_FREQ: u32 = 800_000_000;
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