forked from M-Labs/zynq-rs
libcortex_a9: make functions public for use with r5
This commit is contained in:
parent
ddc184cd89
commit
6a5fd192df
|
@ -125,8 +125,8 @@ pub fn dcciall() {
|
||||||
dsb();
|
dsb();
|
||||||
}
|
}
|
||||||
|
|
||||||
const CACHE_LINE: usize = 0x20;
|
pub const CACHE_LINE: usize = 0x20;
|
||||||
const CACHE_LINE_MASK: usize = CACHE_LINE - 1;
|
pub const CACHE_LINE_MASK: usize = CACHE_LINE - 1;
|
||||||
|
|
||||||
#[inline]
|
#[inline]
|
||||||
fn cache_line_addrs(first_addr: usize, beyond_addr: usize) -> impl Iterator<Item = usize> {
|
fn cache_line_addrs(first_addr: usize, beyond_addr: usize) -> impl Iterator<Item = usize> {
|
||||||
|
@ -136,13 +136,13 @@ fn cache_line_addrs(first_addr: usize, beyond_addr: usize) -> impl Iterator<Item
|
||||||
(first_addr..beyond_addr).step_by(CACHE_LINE)
|
(first_addr..beyond_addr).step_by(CACHE_LINE)
|
||||||
}
|
}
|
||||||
|
|
||||||
fn object_cache_line_addrs<T>(object: &T) -> impl Iterator<Item = usize> {
|
pub fn object_cache_line_addrs<T>(object: &T) -> impl Iterator<Item = usize> {
|
||||||
let first_addr = object as *const _ as usize;
|
let first_addr = object as *const _ as usize;
|
||||||
let beyond_addr = (object as *const _ as usize) + core::mem::size_of_val(object);
|
let beyond_addr = (object as *const _ as usize) + core::mem::size_of_val(object);
|
||||||
cache_line_addrs(first_addr, beyond_addr)
|
cache_line_addrs(first_addr, beyond_addr)
|
||||||
}
|
}
|
||||||
|
|
||||||
fn slice_cache_line_addrs<T>(slice: &[T]) -> impl Iterator<Item = usize> {
|
pub fn slice_cache_line_addrs<T>(slice: &[T]) -> impl Iterator<Item = usize> {
|
||||||
let first_addr = &slice[0] as *const _ as usize;
|
let first_addr = &slice[0] as *const _ as usize;
|
||||||
let beyond_addr = (&slice[slice.len() - 1] as *const _ as usize) +
|
let beyond_addr = (&slice[slice.len() - 1] as *const _ as usize) +
|
||||||
core::mem::size_of_val(&slice[slice.len() - 1]);
|
core::mem::size_of_val(&slice[slice.len() - 1]);
|
||||||
|
|
|
@ -3,6 +3,7 @@ use libregister::{
|
||||||
RegisterR, RegisterW, RegisterRW,
|
RegisterR, RegisterW, RegisterRW,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
#[macro_export]
|
||||||
macro_rules! def_reg_r {
|
macro_rules! def_reg_r {
|
||||||
($name:tt, $type: ty, $asm_instr:tt) => {
|
($name:tt, $type: ty, $asm_instr:tt) => {
|
||||||
impl RegisterR for $name {
|
impl RegisterR for $name {
|
||||||
|
@ -18,6 +19,7 @@ macro_rules! def_reg_r {
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#[macro_export]
|
||||||
macro_rules! def_reg_w {
|
macro_rules! def_reg_w {
|
||||||
($name:ty, $type:ty, $asm_instr:tt) => {
|
($name:ty, $type:ty, $asm_instr:tt) => {
|
||||||
impl RegisterW for $name {
|
impl RegisterW for $name {
|
||||||
|
@ -37,6 +39,7 @@ macro_rules! def_reg_w {
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#[macro_export]
|
||||||
macro_rules! wrap_reg {
|
macro_rules! wrap_reg {
|
||||||
($mod_name: ident) => {
|
($mod_name: ident) => {
|
||||||
pub mod $mod_name {
|
pub mod $mod_name {
|
||||||
|
|
Loading…
Reference in New Issue