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libcortex_a9: make functions public for use with r5

feature/cortex-r5
Brad Bondurant 2022-11-10 09:23:58 -05:00
parent ddc184cd89
commit 6a5fd192df
2 changed files with 7 additions and 4 deletions
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8
libcortex_a9/src/cache.rs
View File

@ -125,8 +125,8 @@ pub fn dcciall() {
dsb();
}
const CACHE_LINE: usize = 0x20;
const CACHE_LINE_MASK: usize = CACHE_LINE - 1;
pub const CACHE_LINE: usize = 0x20;
pub const CACHE_LINE_MASK: usize = CACHE_LINE - 1;
#[inline]
fn cache_line_addrs(first_addr: usize, beyond_addr: usize) -> impl Iterator<Item = usize> {
@ -136,13 +136,13 @@ fn cache_line_addrs(first_addr: usize, beyond_addr: usize) -> impl Iterator<Item
(first_addr..beyond_addr).step_by(CACHE_LINE)
}
fn object_cache_line_addrs<T>(object: &T) -> impl Iterator<Item = usize> {
pub fn object_cache_line_addrs<T>(object: &T) -> impl Iterator<Item = usize> {
let first_addr = object as *const _ as usize;
let beyond_addr = (object as *const _ as usize) + core::mem::size_of_val(object);
cache_line_addrs(first_addr, beyond_addr)
}
fn slice_cache_line_addrs<T>(slice: &[T]) -> impl Iterator<Item = usize> {
pub fn slice_cache_line_addrs<T>(slice: &[T]) -> impl Iterator<Item = usize> {
let first_addr = &slice[0] as *const _ as usize;
let beyond_addr = (&slice[slice.len() - 1] as *const _ as usize) +
core::mem::size_of_val(&slice[slice.len() - 1]);

3
libcortex_a9/src/regs.rs
View File

@ -3,6 +3,7 @@ use libregister::{
RegisterR, RegisterW, RegisterRW,
};
#[macro_export]
macro_rules! def_reg_r {
($name:tt, $type: ty, $asm_instr:tt) => {
impl RegisterR for $name {
@ -18,6 +19,7 @@ macro_rules! def_reg_r {
}
}
#[macro_export]
macro_rules! def_reg_w {
($name:ty, $type:ty, $asm_instr:tt) => {
impl RegisterW for $name {
@ -37,6 +39,7 @@ macro_rules! def_reg_w {
}
}
#[macro_export]
macro_rules! wrap_reg {
($mod_name: ident) => {
pub mod $mod_name {