forked from M-Labs/zynq-rs
openocd: add Kasli-SoC (with digilent external JTAG)
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666c077cef
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# Using external JTAG for now.
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source ./digilent-hs2.cfg
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adapter_khz 1000
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set PL_TAPID 0x1372c093
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set SMP 1
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source ./zynq-7000.cfg
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reset_config none
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set XC7_JSHUTDOWN 0x0d
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set XC7_JPROGRAM 0x0b
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set XC7_JSTART 0x0c
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set XC7_BYPASS 0x3f
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proc xc7_program {tap} {
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global XC7_JSHUTDOWN XC7_JPROGRAM XC7_JSTART XC7_BYPASS
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irscan $tap $XC7_JSHUTDOWN
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irscan $tap $XC7_JPROGRAM
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runtest 60000
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#JSTART prevents this from working...
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#irscan $tap $XC7_JSTART
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runtest 2000
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irscan $tap $XC7_BYPASS
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runtest 2000
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}
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pld device virtex2 zynq.tap 1
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init
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xc7_program zynq.tap
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halt
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# Disable MMU
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targets $_TARGETNAME_1
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arm mcr 15 0 1 0 0 [expr [arm mrc 15 0 1 0 0] & ~0xd]
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targets $_TARGETNAME_0
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arm mcr 15 0 1 0 0 [expr [arm mrc 15 0 1 0 0] & ~0xd]
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