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zynq_us/slcr: make `unlocked` method a trait

feature/zcu111
Brad Bondurant 2022-11-17 15:42:31 -05:00
parent c2455b1cda
commit 2e5f7ec2f7
4 changed files with 31 additions and 10 deletions
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4
libboard_zynq_us/src/slcr/common.rs
View File

@ -2,6 +2,10 @@
use libregister::{register, register_bit, register_bits};
pub trait SlcrRegisterBlock {
fn unlocked<F: FnMut(&mut Self) -> R, R>(f: F) -> R;
}
register!(wprot, WProt, RW, u32);
register_bit!(wprot, active, 0);

10
libboard_zynq_us/src/slcr/crf_apb.rs
View File

@ -7,7 +7,7 @@ use libregister::{
RegisterW,
};
use super::common::{WProt, PllCfg, PllCtrl, PllFracCfg};
use super::common::{SlcrRegisterBlock, WProt, PllCfg, PllCtrl, PllFracCfg};
#[repr(C)]
pub struct RegisterBlock {
@ -57,11 +57,11 @@ pub struct RegisterBlock {
pub rst_fpd_apu: RW<u32>,
pub rst_ddr_ss: RW<u32>,
}
register_at!(RegisterBlock, 0xFD1A_0000, crf_apb);
register_at!(RegisterBlock, 0xFD1A_0000, slcr);
impl RegisterBlock {
pub fn unlocked<F: FnMut(&mut Self) -> R, R>(mut f: F) -> R {
let mut self_ = Self::crf_apb();
impl SlcrRegisterBlock for RegisterBlock {
fn unlocked<F: FnMut(&mut Self) -> R, R>(mut f: F) -> R {
let mut self_ = Self::slcr();
self_.crf_wprot.write(WProt::zeroed().active(false));
let r = f(&mut self_);
self_.crf_wprot.write(WProt::zeroed().active(true));

12
libboard_zynq_us/src/slcr/crl_apb.rs
View File

@ -6,7 +6,7 @@ use libregister::{
register_bit, register_bits,
};
use super::common::{WProt, PllCfg, PllCtrl, PllFracCfg};
use super::common::{SlcrRegisterBlock, WProt, PllCfg, PllCtrl, PllFracCfg};
#[repr(C)]
pub struct RegisterBlock {
@ -141,7 +141,15 @@ pub struct RegisterBlock {
pub bank3_slew_ctrl: RW<u32>,
pub bank3_status: RO<u32>,
}
register_at!(RegisterBlock, 0xFF5E_0000, crl_apb);
register_at!(RegisterBlock, 0xFF5E_0000, slcr);
impl SlcrRegisterBlock for RegisterBlock {
// Dummy definition (CRL_APB has no WProt) for consistency with CRF_APB
fn unlocked<F: FnMut(&mut Self) -> R, R>(mut f: F) -> R {
let mut self_ = Self::slcr();
f(&mut self_)
}
}
register!(pll_status, PllStatus, RO, u32);
register_bit!(pll_status, rpu_pll_stable, 4);

15
libboard_zynq_us/src/slcr/iou_slcr.rs
View File

@ -3,10 +3,11 @@
use volatile_register::{RO, RW, WO};
use libregister::{
register, register_at,
register_bit, register_bits, register_bits_typed,
RegisterW, RegisterRW,
register_bit, register_bits,
};
use super::common::SlcrRegisterBlock;
#[repr(C)]
pub struct RegisterBlock {
@ -79,7 +80,15 @@ pub struct RegisterBlock {
pub idr: WO<u32>,
pub itr: WO<u32>,
}
register_at!(RegisterBlock, 0xFF18_0000, iou_slcr);
register_at!(RegisterBlock, 0xFF18_0000, slcr);
impl SlcrRegisterBlock for RegisterBlock {
// Dummy definition for consistency
fn unlocked<F: FnMut(&mut Self) -> R, R>(mut f: F) -> R {
let mut self_ = Self::slcr();
f(&mut self_)
}
}
register!(mio_pin, MioPin, RW, u32);