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63 Commits

Author SHA1 Message Date
occheung 011d63f3eb 4410: modify ram example 
* Use `prepare()` to init the arrays, would be great if the value can be prepared there. However, the type check was not happy about it.
* Separate RAM configuration into a separate function
* Separate DDS init, digital attenuation & switch config in an init function
* Use `dds.set()`. It is supposed to look simple.

All these are to avoid repeating the long code in the coming RAM+SYNC example.
 2021-12-07 16:21:56 +08:00
occheung 0dbf7a70c4 4410: add phase param to single-tone sync e.g. 
+- 0.25 turns w.r.t the other channel, excluding I/O update mismatch
 2021-12-07 16:20:18 +08:00
occheung 7265d05bae 4410-4412: remove leftover comment 2021-12-07 16:19:05 +08:00
occheung b657e0fea5 4410-4412: clarify nominal power 
The same figure can be found in sinara issue 354 / urukul issue 3, and it was meant to be an empirical limit for low frequency RF outputs.
 2021-12-06 13:17:19 +08:00
occheung ca896ed094 4410-4412: fix phase noise layout, add harmonics 2021-12-06 13:06:24 +08:00
occheung e109ec2b6f 4410-4412: fix performance data condition 
The condition should now align with wiki and sinara issue 354 / urukul issue 3.
 2021-12-06 13:05:46 +08:00
occheung 41c6e37c74 4410-4412: fix caption 2021-12-06 12:39:35 +08:00
occheung 894823d2d4 4410-4412: remove phase param from single-tone e.g. 2021-12-06 11:53:45 +08:00
occheung 74bc8ef797 4410-4412: add waveform for ram mod e.g. 2021-12-06 11:52:31 +08:00
occheung 11b1aee030 4410-4412: specify digital for attenuator specs 2021-12-06 10:46:39 +08:00
occheung 3b4b44c833 4410-4412: remove air flow spec 2021-12-06 10:43:49 +08:00
occheung c5c8701341 4410-4412: fix photo 2021-12-02 13:31:04 +08:00
occheung 69da8ea9b4 4410 -> 4410-4412, 4410/4412 2021-12-02 13:29:35 +08:00