forked from sinara-hw/datasheets
1124: add insn for clock configuation setup
This commit is contained in:
parent
4b9822c07e
commit
ebc1235847
6
1124.tex
6
1124.tex
|
@ -273,6 +273,12 @@ Kasli 2.0 supports a set of clock systhesizing options for the (D)RTIO system:
|
|||
Alternatively, the clock synthesizer can be bypassed using the \texttt{ext0\char`_bypass} clocking option, where the RTIO clock is directly supplied to the SMA connector.
|
||||
The resulting clock signal is then routed to both the RTIO system and downstream DRTIO satellites.
|
||||
|
||||
Clocking options should be configured by setting the value of the \texttt{rtio} key to the desired configuration through \texttt{artiq\char`_coremgmt}.
|
||||
For example, the RTIO frequency is synthesized from the external 10 MHz from the SMA connector after issuing the following command.
|
||||
\begin{minted}{bash}
|
||||
artiq_coremgmt config write -s rtio ext0_synth0_10to125
|
||||
\end{minted}
|
||||
|
||||
\subsection{DRTIO Satellite}
|
||||
The RTIO clock is first recovered from the SFP transceiver connected to the upstream device. The signal is then cleaned by Si5324 clock synthesizer.
|
||||
The resulting clock signal is then routed to the RTIO system and downstream DRTIO satellties.
|
||||
|
|
Loading…
Reference in New Issue