forked from sinara-hw/datasheets
suservo: refrain from generating channel list
For consistency with other DDS examples that uses multiple channels. e.g. TTL relay external trigger, DDS synchronization
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@ -821,16 +821,16 @@ In the following example, the amplitude of DDS is proportional to the ADC input
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First, initialize the RTIO, SU-Servo and its channel.
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Note that the programmable gain of the Sampler is $10^0=1$, the input range is [-10V, 10V].
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\inputcolorboxminted{firstline=14,lastline=21}{examples/suservo.py}
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\inputcolorboxminted{firstline=12,lastline=19}{examples/suservo.py}
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Next, setup the PI control as an IIR filter. It has -1 proportional gain $k_p$ and no integrator gain $k_i$.
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\inputcolorboxminted{firstline=22,lastline=29}{examples/suservo.py}
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\inputcolorboxminted{firstline=20,lastline=27}{examples/suservo.py}
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Then, configure the DDS frequency to 10 MHz with 3V input offset.
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When input voltage $\geq$ offset voltage, the DDS output amplitude is 0.
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\inputcolorboxminted{firstline=30,lastline=34}{examples/suservo.py}
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\inputcolorboxminted{firstline=28,lastline=32}{examples/suservo.py}
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SU-Servo encodes the ADC voltage in a linear scale [-1, 1].
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Therefore, 3V is converted to 0.3.
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@ -838,7 +838,7 @@ Note that the ASF of all DDS channels are capped at 1.0, the amplitude clips whe
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Finally, enable the SU-Servo channel with the IIR filter programmed beforehand.
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\inputcolorboxminted{firstline=36,lastline=37}{examples/suservo.py}
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\inputcolorboxminted{firstline=34,lastline=35}{examples/suservo.py}
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A 10 MHz DDS signal is generated from the example above, with amplitude controllable by ADC.
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The RMS voltage of the DDS channel against the ADC voltage is plotted.
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@ -7,9 +7,7 @@ class SUServoExample(EnvExperiment):
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def build(self):
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self.setattr_device("core")
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self.suservo = self.get_device("suservo0")
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self.suschannels = [
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self.get_device("suservo0_ch0")
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]
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self.suschannel0 = self.get_device("suservo0_ch0")
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@kernel
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def run(self):
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@ -18,8 +16,8 @@ class SUServoExample(EnvExperiment):
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self.suservo.init()
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self.suservo.set_pgia_mu(0, 0) # unity gain
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self.suservo.cplds[0].set_att(0, 15.)
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self.suschannels[0].set_y(profile=0, y=0.) # Clear integrator
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self.suschannels[0].set_iir(
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self.suschannel0.set_y(profile=0, y=0.) # Clear integrator
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self.suschannel0.set_iir(
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profile=0,
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adc=0, # take data from Sampler channel 0
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kp=-1., # -1 P gain
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@ -27,11 +25,11 @@ class SUServoExample(EnvExperiment):
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g=0., # no integrator gain limit
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delay=0. # no IIR update delay after enabling
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)
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self.suschannels[0].set_dds(
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self.suschannel0.set_dds(
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profile=0,
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offset=-.3, # 3 V with above PGIA settings
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frequency=10*MHz,
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phase=0.)
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# enable RF, IIR updates and set profile
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self.suschannels[0].set(en_out=1, en_iir=1, profile=0)
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self.suschannel0.set(en_out=1, en_iir=1, profile=0)
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self.suservo.set_config(enable=1)
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